https://community.altera.com/discussions/fpga-device/arria-10-low-latency-40g-ethernet-fails-to-compile-with-vhdl/304747
Arria 10 Low Latency 40G Ethernet Fails to compile with VHDL | Altera Community - 304747
Hello, I'm trying to evaluate the Low Latency 40G Ethernet core in a VHDL based design. The settings of the core are the same as the example design. I've... -...