https://docs.amd.com/r/en-US/ug1087-zynq-ultrascale-registers/CEID0_EL0-A53_PMU_0-Register?contentId=blNtF0xDrcU10Jr0cCOc8Q
CEID0_EL0 (A53_PMU_0) Register - CEID0_EL0 (A53_PMU_0) Register - UG1087
CEID0_EL0 (A53_PMU_0) Register Description Register Name CEID0_EL0 Offset Address 0x0000000E20 Absolute Address 0x00FEC30E20 (CORESIGHT_A53_PMU_0) Width 32...
pmuregister