https://docs.amd.com/r/en-US/ug1087-zynq-ultrascale-registers/DX5LCDLR0-DDR_PHY-Register
DX5LCDLR0 (DDR_PHY) Register - DX5LCDLR0 (DDR_PHY) Register - UG1087
DX5LCDLR0 (DDR_PHY) Register Description Register Name DX5LCDLR0 Offset Address 0x0000000C80 Absolute Address 0x00FD080C80 (DDR_PHY) Width 32 Type mixedMixed...
ddrphyregister