https://vivo.colorado.edu/display/conference_2066634396
IEEE-Computer-Society Annual Symposium on VLSI (ISVLSI) | CU Experts | CU Boulder
ieee computer societyannual symposium
https://research.ibm.com/publications/optimal-shieldingspacing-metrics-for-low-power-design
Optimal shielding/spacing metrics for low power design for ISVLSI 2003 - IBM Research
Optimal shielding/spacing metrics for low power design for ISVLSI 2003 by Ravishankar Arunachalam et al.
low power
https://research.ibm.com/publications/analysis-and-optimization-of-thermal-effect-on-stt-ram-based-3-d-stacked-cache-design
Analysis and optimization of thermal effect on STT-RAM based 3-D stacked cache design for ISVLSI...
Analysis and optimization of thermal effect on STT-RAM based 3-D stacked cache design for ISVLSI 2012 by Xiuyuan Bi et al.
https://centri.unibo.it/arces/en/news/2023-ieee-computer-society-annual-symposium-on-vlsi-isvlsi-best-paper-award-to-alessandro-nadalini
2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) Best Paper Award to ARCES Research...
Alessandro Nadalini has received the IEEE ISVLSI 2023 Best Paper Award for the paper: "A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain...