https://docs.amd.com/r/en-US/Vitis-Tutorials-Getting-Started/1.-Compile-of-MM2S-HLS-kernel?contentId=KzATuElia73MPELAF8jvTA
1. Compile of MM2S HLS kernel - 1. Compile of MM2S HLS kernel - 2025.2 English - XD098
compilehlskernelenglish
https://docs.amd.com/r/en-US/pg330-audio-formatter/MM2S-Channel-Offset-Register-0x144?contentId=CjaBxgGLmytObDuqr_R3Aw
MM2S Channel Offset Register (0x144) - MM2S Channel Offset Register (0x144) - 1.0 English - PG330
Bit Default Value Access Type Description 31:16 - - Reserved 15:0 0x0 R/W Channel Offset: Number of bytes of data of each channel in a period. Channel offset =...
channeloffsetregisterenglish
https://docs.amd.com/r/en-US/pg021_axi_dma/MM2S_NXTDESC_MSB-MM2S-Next-Descriptor-Pointer?contentId=XCoJIpgkcFVTK5YxrsKOBg
MM2S_NXTDESC_MSB (MM2S Next Descriptor Pointer) - MM2S_NXTDESC_MSB (MM2S Next Descriptor Pointer) -...
This value provides the upper 32 bits of the pointer to the next descriptor in the descriptor chain. This is used only when AXI DMA is configured for an...
msbnextdescriptorpointer
https://docs.amd.com/r/en-US/pg021_axi_dma/MM2S_BUFFER_ADDRESS-MM2S-Buffer-Address
MM2S_BUFFER_ADDRESS (MM2S Buffer Address) - MM2S_BUFFER_ADDRESS (MM2S Buffer Address) - 7.1 English...
This value provides the pointer to the buffer of data to transfer from system memory to stream. Figure 1. MM2S Buffer Address Table 1. MM2S_BUFFER_ADDRESS...
bufferaddressenglish