riscv32 - Robuta Search

https://www.kernel.org/doc/rustdoc/latest/core/arch/riscv32/fn.sunpkd810.html sunpkd810 in core::arch::riscv32 - Rust Unpack first and zeroth into two 16-bit signed halfwords in each 32-bit chunk core arch rust https://www.kernel.org/doc/rustdoc/latest/core/arch/riscv32/fn.ksubh.html ksubh in core::arch::riscv32 - Rust Subtracts signed lower 16-bit content of two registers with Q15 saturation core arch rust https://www.kernel.org/doc/rustdoc/latest/core/arch/riscv32/fn.sll16.html sll16 in core::arch::riscv32 - Rust Logical left shift packed 16-bit elements, discarding overflow bits core arch rust https://doc.rust-lang.org/core/arch/riscv32/fn.aes32dsmi.html aes32dsmi in core::arch::riscv32 - Rust AES middle round decryption instruction for RV32. core arch rust https://doc.rust-lang.org/core/arch/riscv32/fn.kslra16u.html kslra16u in core::arch::riscv32 - Rust Logical saturating left then arithmetic right shift packed 16-bit elements core arch rust https://doc.rust-lang.org/core/arch/riscv32/fn.sunpkd810.html sunpkd810 in core::arch::riscv32 - Rust Unpack first and zeroth into two 16-bit signed halfwords in each 32-bit chunk core arch rust https://doc.rust-lang.org/core/arch/riscv32/fn.hsv_w.html hsv_w in core::arch::riscv32 - Rust Stores virtual machine memory by word integer hsv w core arch rust https://doc.rust-lang.org/core/arch/riscv32/fn.zunpkd820.html zunpkd820 in core::arch::riscv32 - Rust Unpack second and zeroth into two 16-bit unsigned halfwords in each 32-bit chunk core arch rust https://doc.rust-lang.org/core/arch/riscv32/fn.rcrsa16.html rcrsa16 in core::arch::riscv32 - Rust Cross halves of subtracts and adds packed 16-bit signed numbers, dropping least bits core arch rust https://doc.rust-lang.org/nightly/core/arch/riscv32/fn.sinval_vma_asid.html sinval_vma_asid in core::arch::riscv32 - Rust Invalidate supervisor translation cache for given address space vma asid core arch rust https://doc.rust-lang.org/core/arch/riscv32/fn.sm4ed.html sm4ed in core::arch::riscv32 - Rust Accelerates the block encrypt/decrypt operation of the SM4 block cipher [5, 31]. core arch rust https://doc.rust-lang.org/nightly/core/arch/riscv32/fn.hfence_vvma_asid.html hfence_vvma_asid in core::arch::riscv32 - Rust Hypervisor memory management fence for given guest address space asid core arch rust https://www.kernel.org/doc/rustdoc/latest/core/arch/riscv32/fn.smin16.html smin16 in core::arch::riscv32 - Rust Get minimum values from 16-bit packed signed integers core arch rust https://www.kernel.org/doc/rustdoc/latest/core/arch/riscv32/fn.hinval_gvma.html hinval_gvma in core::arch::riscv32 - Rust Invalidate hypervisor translation cache for guest physical address and virtual machine core arch rust https://doc.rust-lang.org/nightly/core/arch/riscv32/fn.sfence_vma_asid.html sfence_vma_asid in core::arch::riscv32 - Rust Supervisor memory management fence for given address space vma asid core arch rust https://doc.rust-lang.org/core/arch/riscv32/fn.sm4ks.html sm4ks in core::arch::riscv32 - Rust Accelerates the Key Schedule operation of the SM4 block cipher [5, 31] with `bs=0`. core arch rust https://doc.rust-lang.org/nightly/core/arch/riscv32/fn.uksub16.html uksub16 in core::arch::riscv32 - Rust Subtracts packed 16-bit unsigned numbers, saturating at the numeric bounds core arch rust