sc58x - Robuta Search

https://ez.analog.com/dsp/sharc-processors/adsp-sc5xxadsp-215xx/w/documents/32397/adsp-sc58x-multicore-sport-tdm-example ADSP-SC58x Multicore SPORT TDM example - Documents - ADSP-SC5xx/ADSP-215xx - EngineerZone Attached are the ADSP-SC58x example codes for SPORT TDM mode. These codes are configured to transfer data between two cores using internal clock/FS and external example documents adsp multicore sport tdm https://ez.analog.com/dsp/sharc-processors/adsp-sc5xxadsp-215xx/w/documents/14836/adsp-sc58x-2158x-otp-general-purpose-space-programming--example-code ADSP-SC58x/2158x OTP General Purpose space programming- Example code - Documents -... Attached code is an example code for programming the General purpose space in the OTP using ROM API available. This code runs in Cortex A5 in ADSP-SC58x... general purpose example code adsp otp https://ez.analog.com/dsp/sharc-processors/adsp-sc5xxadsp-215xx/w/documents/5142/how-to-select-psize-and-msize-fields-of-the-mdma-configuration-register-on-adsp-sc58x-adsp-2158x How to select PSIZE and MSIZE fields of the MDMA configuration register on ADSP-SC58x/ADSP-2158x ?... Each DMA channel has two buses, one that connects to the SCB, which in turn is connected to the SCB slave (e.g. memories), and another bus that connects to... https://ez.analog.com/dsp/sharc-processors/adsp-sc5xxadsp-215xx/w/documents/5154/how-dmc-ddr-controller-in-adsp-sc58x-adsp-2158x-different-than-ddr2-controller-on-adsp-2146x How DMC/DDR controller in ADSP-SC58x/ADSP-2158x different than DDR2 controller on ADSP-2146x ? -... ADSP-2146x ADSP-SC58x/ADSP-2158x Supports only DDR2 memory devices Supports DDR3, DDR2, and LPDDR memory devices Supports maximum clock/data https://ez.analog.com/dsp/sharc-processors/adsp-sc5xxadsp-215xx/w/documents/14878/adsp-sc58x-2158x-interrupt-sharc-core-from-arm-example-code ADSP-SC58x/2158x interrupt SHARC core from ARM:Example code - Documents - ADSP-SC5xx/ADSP-215xx -... Hi, Please refer the attached zip file for the example code to interrupt the SHARC core using ARM cores. In this setup, the software interrupts are enabled for https://ez.analog.com/dsp/sharc-processors/adsp-sc5xxadsp-215xx/w/documents/14834/adsp-sc58x-2158x-uart-autobaud---code-example ADSP-SC58x/2158x UART autobaud - Code Example - Documents - ADSP-SC5xx/ADSP-215xx - EngineerZone Attached is the UART code for autobaud detection. The signal whose baud rate is to be calculated is connected to the UART_Rx pin. Timer0 internally routed to... code example adsp uart https://ez.analog.com/dsp/sharc-processors/adsp-sc5xxadsp-215xx/w/documents/5053/how-can-i-validate-the-ddr-interface-on-my-newely-designed-board-based-on-adsp-sc58x-adsp-2158x-processors How can I validate the DDR interface on my newely designed board based on ADSP-SC58x/ADSP-2158x... Before starting application development on a newly designed board with ADSP-SC58x/ADSP-2158x processors along with DDR3/DDR2/LPDDR memory interface, it is very... https://ez.analog.com/dsp/software-and-development-tools/sigmastudio-for-sharc/f/q-a/120756/building-a-96k-192k-version-of-ss_app_core-for-adsp-sc58x-ez-board Building a 96k / 192k version of SS_App_Core for ADSP-SC58x EZ board - Q&A - SigmaStudio for SHARC... Dear support, The Demo version of SS_App_Core for ADSP-SC58x EZ board supports only 48k sampling rate. Is it possible to modify the code to support 96k and 192k https://ez.analog.com/dsp/sharc-processors/w/documents/5017/adsp-sc58x-ffta-benchmarks ADSP-SC58x FFTA Benchmarks - Documents - SHARC Processors - EngineerZone ADSP-SC58x FFTA module is designed for high performance pipe-lined FFT/IFFT operations. The following tables provides the FFTA benchmark numbers measured on the adsp ffta benchmarks documents sharc https://ez.analog.com/dsp/software-and-development-tools/cces/w/documents/15241/uart-dma-mode-operation-in-sc58x-processors-audit UART DMA mode operation in SC58x processors Audit - Documents - CrossCore Embedded Studio and... Question: Example project which helps to understand UART DMA operation in SC58x processors Answer: The attached project which helps to understand UART DMA mode https://ez.analog.com/dsp/sharc-processors/adsp-sc5xxadsp-215xx/w/documents/14835/adsp-sc58x-2158x-cortex-a5-software-interrupt--example-code ADSP-SC58x/2158x Cortex A5 Software Interrupt- Example code - Documents - ADSP-SC5xx/ADSP-215xx -... Attached code shows how to trigger software interrupt from Cortex A5 core to same core. This code runs in Cortex A5 in ADSP-SC58x processor....