https://ez.analog.com/data_converters/high-speed_dacs/f/q-a/597555/iostandard-for-sysref-generated-by-hmc7044-in-ad9174-fmc-ebz
IOSTANDARD for SYSREF generated by HMC7044 in AD9174-FMC-EBZ - Q&A - High-Speed DACs - EngineerZone
Hi, I am using a Kintex-7 FPGA (not KCU105) to evaluate the AD9174-FMC-EBZ. I am facing some difficulty in understanding which IO standard is appropriate to use
https://ez.analog.com/data_converters/high-speed_adcs/f/q-a/549557/ad9695-sysref-dc-coupled-lvpecl-termination/432342
AD9695 SYSREF DC COUPLED LVPECL TERMINATION - Q&A - High-Speed ADCs - EngineerZone
Hi I'm driving sysref to AD9695 from HMC7044. Since I use 1shot sysref it must be DC coupled. HMC can't work in LVDS mode for DC coupled 1shot sysref (known
dc coupled
https://docs.amd.com/r/en-US/pg269-rf-data-converter/Analog-SYSREF-Capture/Receive?contentId=wUJV8f3_jv8~DQE5tsbUCg
Analog SYSREF Capture/Receive - Analog SYSREF Capture/Receive - 2.6 English - PG269
The receiver of the analog SYSREF in RF-DAC tile 0 is designed to capture a rising edge at the input pins and generate a sync pulse that gets distributed...
analogcapturereceiveenglish