https://docs.amd.com/r/en-US/pg381-perf-axi-tg-spec/WRBEAT_CNTR-Register-0x203C?contentId=djkkUxmEYUVUmNzm7zgk7g
WRBEAT_CNTR Register (0x203C) - WRBEAT_CNTR Register (0x203C) - 1.0 English - PG381
Table 1. WRBEAT_CNTR Register (0x203C) Bit Default Value Access Type Description 31:0 0x0000_0000 RO Number of Write beats issued by the TG
cntrregisterenglish