https://docs.amd.com/r/en-US/ug900-vivado-logic-simulation/Parsing-Design-Files-xvhdl-and-xvlog?contentId=KDZzrNnha8EZuyGpbQFMdQ
Parsing Design Files, xvhdl and xvlog - Parsing Design Files, xvhdl and xvlog - 2025.2 English -...
The xvhdl and xvlog commands parse VHDL and Verilog files, respectively. Descriptions for each option are available in Table 1. xvhdl The xvhdl command is the...
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