https://ez.analog.com/fpga/f/q-a/582601/building-an-hdl-project/530285
Building an HDL Project - Q&A - FPGA Reference Designs - EngineerZone
Hi, I am trying to Build an HDL project of one of the reference designs but am failing when invoking make. I am currently following this: Build an HDL project
fpga reference designsproject qbuildinghdl