https://www.abebooks.com/9781596933835/Design-Methodology-CMOS-Phase-Locked-1596933836/plp
Design Methodology for RF CMOS Phase Locked Loops - Quemada, Carlos; Bistue, Guillermo; Adin,...
Engineers face stiff challenges in designing phase-locked loop (PLL) circuits for wireless communications thanks to phase noise and other obstacles. This...
phase locked loops
https://www.analog.com/en/resources/analog-dialogue/articles/pll-for-high-frequency-receivers-and-transmitters-3.html
Phase-Locked Loops for High-Frequency Receivers and Transmitters - Part 3 | Analog Devices
In the last part of the series, we deal with some of the main building blocks that go to make up the PLL synthesizer.
phase locked loops
https://www.electronicdesign.com/technologies/analog/article/21263185/phase-noise-modeling-simulation-and-propagation-in-phase-locked-loops-part-2
Phase Noise Modeling, Simulation, and Propagation in Phase-Locked Loops (Part 2) | Electronic Design
In Part 2, we design a hypothetical PLL frequency synthesizer as an example to be used for analysis.
https://www.electronicdesign.com/technologies/analog/article/21267372/phase-noise-modeling-simulation-and-propagation-in-phase-locked-loops-part-3
Phase-Noise Modeling, Simulation, and Propagation in Phase-Locked Loops (Part 3) | Electronic Design
Wrapping up the series, in Part 3 we analyze the example hypothetical synthesizer to demonstrate the concepts and methods presented so far.