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https://www.motorolasolutions.com/en_xu/about/environmental-social-corporate-governance-esg/our-business/technology-leadership/technology-licensing/multiple-reference-clock-generator.html Multiple Reference Clock Generator - Motorola Solutions EMEA The multiple reference clock generator features a phase locked loop (PLL) . Get additional information about how to license MRCG technology from motorola. reference clock motorola solutions multiple generator emea https://www.intel.com/content/www/us/en/docs/programmable/769310/current/f-tile-transceiver-reference-clock-.html F-Tile Transceiver Reference Clock Specifications reference clock tile transceiver specifications https://www.intel.com/content/www/us/en/programmable/quartushelp/current/da_rules/ipc_40023.htm IPC-40023: Reference clock frequency mismatch Description Reference clock ports of protocol IP must be driven, if present. These ports can be driven only by top level clock ports. Furthermore, reference... reference clock ipc frequency mismatch https://lkml.org/lkml/2011/9/28/389 LKML: Paulo Zanoni: Re: [Intel-gfx] PCH reference clock cleanups reference clock lkml paulo zanoni intel https://www.mail-archive.com/chrony-dev@chrony.tuxfamily.org/msg02853.html Re: [chrony-dev] [RFC] Transparent fallback from NTP reference clock to RTC https://www.intel.com/content/www/us/en/programmable/quartushelp/current/da_rules/tmc_30041.htm TMC-30041: Constraint with Invalid Clock Reference Description Violations of this rule identify constraints that reference one or more clocks that did not exist at the time the constraint was issued, or were... tmc constraint invalid clock reference