https://riscv.org/
Home - RISC-V International
Apr 8, 2026 - RISC-V is an open standard Instruction Set Architecture (ISA) enabling a new era of processor innovation through open collaboration.
risc vinternational
https://www.youtube.com/channel/UC5gLmcFuvdGbajs4VL-WU3g
RISC-V International - YouTube
This is the official YouTube channel of RISC-V International. We will post videos of presentations from our workshop and other RISC-V related events.
risc vinternationalyoutube
https://www.remlab.net/op/riscv-hcf.shtml
Remlab: RISC-V HCF instructions
risc vhcfinstructions
https://www.riscoslondonshow.co.uk/
RISC OS London Show: WELCOME
risc oslondonshowwelcome
https://www.riscosdev.com/
Home - RISC OS Developments
Aug 20, 2025 - Welcome to RISC OS Developments Formed in 2016, our purpose is to secure the future of RISC OS and its applications through investment and development, and by...
risc osdevelopments
https://riscv.org/developers/ambassadors-advocates/
Ambassadors and Advocates - RISC-V International
Individuals passionate about RISC-V and dedicated to growing and engaging the RISC-V community.
risc vambassadorsadvocatesinternational
https://www.flickr.com/people/194299101@N07/
About RISC-V International | Flickr
RISC-V International is the global non-profit home of the open standard RISC-V Instruction Set Architecture (ISA), related specifications, and stakeholder...
risc vinternationalflickr
https://www.synopsys.com/verification/imperasdv.html
ImperasDV: RISC-V Processor Verification Solution | Synopsys
Discover ImperasDV, the RISC-V verification tool with reference models, functional coverage, and advanced debugging for custom processors.
risc vimperasdvprocessorverificationsolution
https://riscv.org/developers/
Developers - RISC-V International
Dec 4, 2024 - The flexibility and extensibility of RISC-V, combined with the expertise and resources of the RISC-V member ecosystem, open new possibilities for hardware and...
risc vdevelopersinternational
https://eprint.iacr.org/2021/597
Accelerated RISC-V for Post-Quantum SIKE
Software implementations of cryptographic algorithms are slow but highly flexible and relatively easy to implement. On the other hand, hardware implementations...
risc vpost quantumacceleratedsike
https://risczero.com/
Universal Zero Knowledge | RISC Zero
Unlock the full potential of ZK on every chain. High-performance, cost-effective, and powered by the leading open-source zkVM.
zero knowledgeuniversalrisc
https://www.riscository.com/
RISC OS news & info with an irreverent style
risc osnews infoirreverentstyle
https://bluespec.com/
Open Source RISC-V Cores and Tools | Bluespec
Bluespec provides RISC-V processor IP and tools for developing RISC-V cores and subsystems. We take the risk out of RISC-V to enable you to achieve the highest...
open sourcerisc vcorestools
https://trustworthy.systems/publications/abstracts/Wistoff_SGBH_21.abstract
TS | Microarchitectural timing channels and their prevention on an open-source 64-bit RISC-V core
https://www.riscosopen.org/content/
RISC OS Open: Welcome
risc osopenwelcome
https://github.com/riscv/
RISC-V · GitHub
The Open-Standard Instruction Set Architecture. RISC-V has 71 repositories available. Follow their code on GitHub.
risc vgithub
https://mips.com/
MIPS Processor, RISC-V, Innovate Compute
Apr 23, 2026 - Discover the capabilities of the MIPS processors for superior computing performance and efficiency - MIPS RISC-V Cores - Freedom to Innovate Compute.
risc vmipsprocessorinnovatecompute
https://discord.com/invite/risczero
RISC Zero
Home of the RISC Zero Community | 5349 members
risczero
https://www.riscus.com/af_free_gift_log/driver-safety-25-23013/
Driver Safety 25 ( #23013 ) - RISC
driver safetyrisc
https://www.digitimes.com/news/a20231013PD211/analysis-china-export-restrictions-ic-design-distribution-risc-v.html
US's tentative restrictions on RISC-V will harm itself the most, instead of China
Bipartisan efforts in the US Congress are trying to push the Biden Administration to take action in restricting US individuals or companies from exporting...
https://www.risc.cy/about
More about us | RISC
more about usrisc
https://risc.jku.at/m/clemens-hofstadler/clemens-hofstadler-2/
Clemens Hofstadler - RISC - Johannes Kepler University
johannes keplerclemensriscuniversity
https://builds.managarm.org/projects/managarm_riscv64/2026-05-04T13:14:41/logs?node=tool:wayland-scanner
Logs for build 2026-05-04T13:14:41 of Managarm (RISC-V 64-bit) - xbbs @ hades
https://riscinstitute.net/course/index.php?categoryid=87
All courses | RISC Institute
all coursesriscinstitute
https://builds.managarm.org/projects/managarm_riscv64/2026-05-05T23:41:39/logs
Logs for build 2026-05-05T23:41:39 of Managarm (RISC-V 64-bit) - xbbs @ hades
https://www.heise.de/news/Schwachstelle-Ghostwrite-erlaubt-DRAM-Zugriff-in-RISC-V-CPUs-9830926.html
Schwachstellen in chinesischen RISC-V CPUs | heise online
Aug 10, 2024 - Deutsche Forscher fanden Schwachstellen in einzelnen RISC-V CPUs von T-Head Semiconductors. Die flexible, junge Architektur entpuppt sich dabei als Risiko.
risc vschwachstellencpusheiseonline
https://pulp-platform.org/community/showthread.php?tid=76&pid=169&mode=threaded
RISC-V GNU Compiler Toolchain: Build Error
risc vgnu compilertoolchainbuilderror
https://docs.riscv.org/reference/iommu/iommu_intro.html
Untitled :: RISC-V Ratified Specifications Library
risc vuntitledratifiedspecificationslibrary
https://www.riscus.com/af_free_gift_log/driver-safety-2022-17220/
Driver Safety 2022 ( #17220 ) - RISC
driver safetyrisc
https://riscv.org/blog/beaglev-fire-unboxing-running-linux-6-1-kernel-on-risc-v/
BeagleV-Fire Unboxing - Running Linux 6.1 Kernel on RISC-V! - RISC-V International
https://www.denexus.io/resources/nerc-risc-2025-grid-cyber-risk
NERC 2025 RISC Report: Grid Cyber Risk & How CRQ + QVM Help
NERC's 2025 RISC report flags cyber and large-load risks as top grid threats.
cyber risknercriscreportgrid
https://syntaxhighlighter.app/riscv
RISC-V Syntax Highlighter - Free Source Code Beautification Tool
Welcome to the RISC-V Syntax Highlighter, an online tool that highlights code according to the syntax of RISC-V and supports exporting to HTML source files,...
risc vsyntax highlighterfree sourcecodebeautification
https://www.riscus.com/af_free_gift_log/driver-safety-2022-17940/
Driver Safety 2022 ( #17940 ) - RISC
driver safetyrisc
https://www.cnx-software.com/2024/04/10/imagination-apxm-6200-risc-v-cpu-catapult-cost-sensitive-consumer-industrial-applications/
Imagination launches the APXM-6200 RISC-V "Catapult" CPU for cost-sensitive consumer and industrial...
Apr 10, 2024 - Imagination has expanded its Catapult product portfolio to include a new RISC-V core, the Imagination APXM-6200 CPU. The APXM-6200 is a 64-bit, in-order
https://riscv.org/blog/people/nick-kossifidis/
Nick Kossifidis - RISC-V International
Oct 15, 2024 - Community Representative https://dev-risc-v.pantheonsite.io/wp-content/uploads/2023/01/profile-riscv.jpg
risc vnickinternational
https://consulting.riscgroup.co/
De RISC Consulting — Website by it-support
website byderiscconsultingsupport
https://abopen.com/news/a-look-at-the-risc-v-pc-from-sifive/
A Look at the RISC-V PC from SiFive - AB Open
Nov 5, 2020 - On October 29th 2020 SiFive announced the first-ever RISC-V Linux development platform with a PC form factor, the HiFive Unmatched.
look atrisc v
https://moodle.risc.jku.at/course/view.php?id=134
Course: Formal Models of Parallel and Distributed Systems (SS 2017) | RISC
distributed systemscourseformalmodelsparallel
https://www2.advantech.net.au/embedded-boards-design-in-services/risc-computing-platforms/ipbased.aspx
IP-based Box Computer for Edge Computing-RISC Computing Platforms-Advantech
for edgeipbasedboxcomputer
https://www.riscus.com/af_free_gift_log/driver-safety-2022-16811/
Driver Safety 2022 ( #16811 ) - RISC
driver safetyrisc
https://www.riscus.com/af_free_gift_log/driver-safety-2022-17315/
Driver Safety 2022 ( #17315 ) - RISC
driver safetyrisc
https://www.risc0.com/
Universal Zero Knowledge | RISC Zero
Unlock the full potential of ZK on every chain. High-performance, cost-effective, and powered by the leading open-source zkVM.
zero knowledgeuniversalrisc
https://dvrisc.org/resource/assessing-and-addressing-the-hidden-crime-of-stalking/
Assessing and Addressing the Hidden Crime of Stalking - DV RISC
Nov 17, 2023 - Webinar on stalking and the Stalking and Harassment Assessment and Risk Profile (SHARP).
the hiddenassessingaddressingcrimestalking
https://www.cd-risc.com/
CD-RISC: Home
cdrisc
https://coscup.org/2023/zh-TW/session/ZSZAKG
Open source RISC-V GPGPU - COSCUP 2023 | Conference for Open Source Coders, Users, and Promoters
Vortex is an open source Hardware and Software project to support GPGPU based...
https://risc.jku.at/pj/the-medlar-project-medlar-ii/
The MEDLAR project [MEDLAR-II] - RISC - Johannes Kepler University
The MEDLAR project [MEDLAR-II] (Project Leader: Bruno Buchberger). Director Bruno Buchberger, Joachim Pfalzgraf. The goals of this project are: synthesis of...
project iijohannes keplermedlarriscuniversity
https://semiwiki.com/category/ip/risc-v/
RISC-V Archives - SemiWiki
risc varchives
https://moschip.com/blog/embedded-systems-device-engineering/zephyr-rtos-and-risc-v-enabling-next-gen-edge-fpga-devices/
Zephyr RTOS and RISC-V: Enabling Next-Gen Edge FPGA Devices - MosChip
Apr 9, 2026 - Discover how Zephyr RTOS, RISC-V, and FPGA empower scalable, real-time embedded edge systems, as showcased by MosChip at DevCon 2024
zephyr rtosrisc v
https://riscinstitute.net/
Home | RISC Institute
riscinstitute
https://apply-for-innovation-funding.service.gov.uk/competition/2198/overview/b2e2fd41-d372-4e33-a6df-8bfefb8de0f9
Competition overview - Contracts for Innovation: DSbD Advancing CHERI RISC-V Devices - Innovation...
competition overviewcontractsinnovation
https://riscv.atlassian.net/wiki/spaces/TAXX/history/565117025
RISC-V Tech Hub
risc vtechhub
https://www.doctorulzilei.ro/hantavirus-in-romania-autoritatile-avertizeaza-asupra-unui-risc-emergent-si-a-lipsei-unui-tratament-specific/
Hantavirus în România. Autoritățile avertizează asupra unui risc emergent și a lipsei unui...
May 7, 2026 - Hantavirus în România. Autoritățile confirmă prezența hantavirusului în cazuri sporadice și atrag atenția că infecția este subdiagnosticată și insuficient...
https://risc.jku.at/m/muhammad-taimoor-khan/muhammad-taimoor-khan/
Muhammad Taimoor Khan - RISC - Johannes Kepler University
Muhammad Taimoor Khan
johannes keplermuhammadkhanriscuniversity
https://risc-inc.com/compliance-management/
Compliance Management - RISC INC
compliance managementriscinc
https://www.computinghistory.org.uk/det/49106/RISC-User-In-a-Nutshell/
RISC User In a Nutshell - Software - Computing History
CD ROM to commemorate the 12 year life of RISC User magazineCD ROM to commemorate the 12 year life of RISC User magazine...
in a nutshellriscusersoftwarecomputing
https://risc-inc.com/author/risc0303-admin/
RISC, Author at RISC INC
riscauthorinc
https://ruyisdk.cn/u/selene
个人资料 - selene - RISC-V 开发者社区
RISC-V 开发者社区(RuyiSDK社区)
risc vselene
https://www.risc.lu/loisirs-et-sports/piscine-et-sports-deau/
Piscine et sports d'eau : Risc : Les Voies Des Parents
piscineetsportseaurisc
https://rickman.orpheusweb.co.uk/cookbk/sections/1310.html
John Rickman RISC OS Notes
risc osjohnrickmannotes
https://docs.riscv.org/reference/acpi-ffh/ffh_resource_descriptor.html
Untitled :: RISC-V Ratified Specifications Library
risc vuntitledratifiedspecificationslibrary
https://www.autoremarketing.com/subprime/risc-acquires-recovery-standard-training/
RISC acquires Recovery Standard Training | Auto Remarketing
Sep 25, 2024 - The compliance education and training offerings from Recovery Industry Services Company (RISC) just became much more robust. On Tuesday, RISC announced the a
riscacquiresrecoverystandardtraining
https://www.hackster.io/news/ghostwrite-a-serious-flaw-in-the-t-head-xuantie-c910-and-c920-cores-hits-popular-risc-v-sbcs-14833c98e33d
GhostWrite, a Serious Flaw in the T-Head XuanTie C910 and C920 Cores, Hits Popular RISC-V SBCs -...
May 1, 2026 - An issue in T-Head's implementation of the RISC-V vector extension renders all security null and void, researchers warn.
https://www.sifive.cn/press/sifive-raises-400-million-to-accelerate-high-performance-risc-v-data-center-solutions
SiFive 融资 4 亿美元加速高性能 RISC-V 数据中心解决方案,公司估值达 36.5 亿美元
RISC-V 处理器 IP 行业标杆 SiFive 今日宣布,公司已完成 4 亿美元的 G 轮超额认购融资,旨在加速其高性能数据中心产品路线图。
risc vsifive
https://riscv.org/blog/sifive-shield-is-an-open-security-platform-for-risc-v-processors-jean-luc-aufranc-cnx-software/
SiFive Shield is an Open Security Platform for RISC-V Processors | Jean-Luc Aufranc, CNX Software -...
Oct 31, 2019 - RISC-V Community News https://www.cnx-software.com/2019/10/24/sifive-shield-open-security-platform-for-risc-v-processors/...
https://risc.jku.at/ps/risc-family-poster-2005-2006/riscposter0506-pdf/
RISCPoster0506.pdf - RISC - Johannes Kepler University
johannes keplerpdfriscuniversity
https://studyriscv.com/problems/
RISC-V Assembly Problems Practice | StudyRISC-V
Practice RISC-V assembly problems in a focused browser workspace with Monaco editing, test cases, and submission flow built for learning.
risc vassemblyproblemspractice
https://lists.openid.net/pipermail/openid-specs-risc/Week-of-Mon-20260105/author.html
The Openid-specs-risc The Week Of Monday 5 January 2026 Archive by author
https://riseproject.dev/
Rise: RISC-V Software Ecosystem – Linux Foundation Project
risc vsoftware ecosystemlinux foundationriseproject
https://casoteca.ro/finantare-consolidare-cladiri-risc-seismic-bucuresti/
Primăria Capitalei a semnat o finanțare pentru consolidarea a șase clădiri cu risc seismic -...
Primarul general a semnat o finanțare de 29,73 milioane de euro pentru consolidarea a șase clădiri din București, inclusiv Muzeul Gheorghe Tăttărescu
https://lists.centos.org/hyperkitty/list/devel@lists.centos.org/thread/SWRNAOA4DPZ7GVE5JCMC2NGQNV74ZJ3U/
Proposal: CentOS Stream RISC-V Datacenter SIG - devel - lists.centos.org
centos streamrisc vproposaldatacentersig
https://www.risc.com/SunOS/Solaris_2.5.1_11_97_sparc/?C=D;O=A
Solaris 2.5.1 11/97 sparc | RISC.com
Solaris 2.5.1 11/97 sparc - installation media screenshots and historical archive at RISC.com.
solarissparcrisc
https://www.riscus.com/af_free_gift_log/driver-safety-2022-20432/
Driver Safety 2022 ( #20432 ) - RISC
driver safetyrisc
https://risc.jku.at/tk/integer-partitions-from-a-geometric-viewpoint-2/
Integer Partitions from a Geometric Viewpoint - RISC - Johannes Kepler University
The study of partitions and compositions (i.e., ordered partitions) of integers goes back centuries and has applications in various areas within and outside of...
from ajohannes keplerintegerpartitionsgeometric
https://www.meteoromania.ro/guvernanta-corporativa/analiza-de-risc/
Meteo Romania | Analiză de risc
meteo romaniaderisc
https://www.riscus.com/af_free_gift_log/driver-safety-2022-21492/
Driver Safety 2022 ( #21492 ) - RISC
driver safetyrisc
https://ruyisdk.cn/u/tong2323
个人资料 - tong2323 - RISC-V 开发者社区
RISC-V 开发者社区(RuyiSDK社区)
risc v
https://kevsoft-risc-os-software.myspreadshop.co.uk/men+polo+shirts?color=blue&q=P26
Polo Shirts | Kevsoft RISC OS Software
Merchandise for Kevsoft RISC OS Software
polo shirtsrisc oskevsoftsoftware
https://tinytapeout.com/chips/ttsky25a/tt_um_combo_haz/
866 Combinational Logic Based RISC-V Pipeline Hazard Resolver :: Quicker, easier and cheaper to...
Design of combinational logic based Pipeline Hazard Resolution Unit for RISC-V Processor
https://riscv.org/blog/people/khem-raj/
Khem Raj - RISC-V International
Nov 3, 2024 - San Jose, California https://dev-risc-v.pantheonsite.io/wp-content/uploads/2024/02/khem-headshot.jpg
risc vkhemrajinternational
https://riscv.org/blog/advanced-risc-v-training-course-maven-silicon-risc-v-global-training-partner/
Advanced RISC-V Training Course | Maven Silicon - RISC-V Global Training Partner - RISC-V...
Mar 15, 2024 - RISC-V Community News By Sivakumar P R In this video, our Founder and CEO, Mr. P R Sivakumar, explains how he has authored the new RISC-V training course and...
risc vtraining courseadvancedmavensilicon
https://www.cayenneindustrytimes.com/article/854199255-reduced-instruction-set-computer-v-risc-v-market-opportunities-share-growth-and-competitive-analysis
Reduced Instruction Set Computer V (Risc-V) Market - Opportunities, Share, Growth and Competitive...
Cayenne Industry Times is an online news publication focusing on industries in the French Guiana: The latest industries and services news from French Guiana
instruction set
https://www.s2cinc.com/s2c's-fpga-prototyping-accelerates-the-iteration-of-xiangshan-riscv-processor.html
S2C's FPGA Prototyping Accelerates the Iteration of XiangShan RISC-V Processor | SemiWiki - S2C.
by Daniel Nenni on 10-30-2023 at 10:00 am Categories: EDA, Prototyping, S2C EDA
https://riscv.org/about/genealogy/
Genealogy Report - RISC-V International
risc vgenealogyreportinternational
https://fooqux.com/article/4294
Tracking down a 25% Regression on LLVM RISC-V - AI Analysis & Scoring
An LLVM commit improved `isKnownExactCastIntToFP`, inadvertently causing a 24% RISC-V performance regression by breaking a downstream narrowing optimization.
https://interface.cqpub.co.jp/fmp_pico2/
連載 Pico 2で比較実験! RISC-VとCortex-M33 サポート・ページ | Interface – CQ出版
picorisc
https://www.iotglobalnetwork.com/iotdir/2025/10/16/upbeat-technology-and-sifive-introduce-next-gen-ultra-low-power-risc-v-mcu-52061/
Upbeat Technology and SiFive introduce next-gen ultra-low power RISC-V MCU - IoT global network
Upbeat Technology and SiFive announce the UP201/UP301 family MCU, a next-gen dual-core RISC-V microcontroller designed for ultra-low power efficiency.
https://whycan.com/t_12726.html
现在最便宜的USBHS单片机是哪个 / RISC-V / 哇酷®开发者社区(WhyCan® Forum)
risc vforum
https://moodle.risc.jku.at/course/view.php?id=173
Course: Formal Semantics of Programming Languages (SS 2021) | RISC
programming languagescourseformalsemanticsss
https://shop.quicklogic.com/2014/02/24/cisc-vs-risc-architectures-on-sensor-hubs/
CISC vs RISC Architectures on Sensor Hubs - QuickLogic Corporation
ciscvsriscarchitecturessensor
https://riscv.org/blog/people/mipi-alliance/
MIPI Alliance - RISC-V International
https://dev-risc-v.pantheonsite.io/wp-content/uploads/2022/01/mipi-logo-horizontal.png
risc vmipiallianceinternational
https://riscv.org/blog/greenwaves-technologies-blog-post-risc-v-roadshow-in-europe-sep-16-26-2019/
GreenWaves Technologies Blog Post: RISC-V Roadshow In Europe, Sep 16-26, 2019 - RISC-V International
Aug 5, 2019 - RISC-V Community News GreenWaves Technologies will participate in RISC-V roadshow in Europe, to discuss RISC-V architecture, commercial and open-source...
https://embeddedcomputing.com/topics/RISC-V
RISC-V Summit - Embedded Computing Design
risc vembedded computingsummitdesign
https://riscv.org/blog/tyrca-a-risc-v-tightly-coupled-accelerator-for-code-based-cryptography/
TYRCA: A RISC-V Tightly-Coupled Accelerator For Code-Based Cryptography - RISC-V International
RISC-V International Staff RISC-V International’s staff bring together expertise from multiple disciplines to advance our mission of promoting the RISC-V...
risc v
https://staging.10xengineers.ai/risc-v-acceleration/
RISC-V Acceleration - 10xEngineers
Jun 20, 2025 - RISC-V Acceleration Home RISC-V Acceleration Expert verification solution for your tech success story With the global semiconductor market cap touching the...
risc vacceleration
https://builds.managarm.org/projects/managarm_riscv64/2026-05-04T21:38:50/logs?node=package:nettle
Logs for build 2026-05-04T21:38:50 of Managarm (RISC-V 64-bit) - xbbs @ hades
https://risc.jku.at/ps/trainingszentrum-fuer-computermathematik/1993-02-15_ooen-pdf/
1993-02-15_OOeN.pdf - RISC - Johannes Kepler University
johannes keplerpdfriscuniversity
https://cpu-collection.de/?tn=1&l0=cl&l1=PA-RISC
cpu-collection.de PA-RISC
cpu-collection.de - a collection of obsolete processors
cpu collectiondeparisc
https://tinytapeout.com/chips/ttihp25b/tt_um_riscv_mini_ihp/
421 RISC-V Mini IHP :: Quicker, easier and cheaper to make your own chip!
RISC-V Mini 8 Bit on IHP
https://heardintech.com/index.php/2025/09/04/risc-v-momentum-why-open-isas-matter-for-next-gen-devices/
RISC-V Momentum: Why Open ISAs Matter for Next-Gen Devices - Heard in Tech
Sep 4, 2025 - RISC-V and the Open-ISA Momentum: Why It Matters for the Next Wave of Devices Open instruction set architectures are reshaping how chips are designed,...
https://www.riscus.com/af_free_gift_log/driver-safety-2022-16399-2/
Driver Safety 2022 ( #16399 ) - RISC
driver safetyrisc