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https://mail-archive.com/cfe-commits@lists.llvm.org/msg634860.html

[clang] [llvm] [RISCV] Add Propeller support for RISC-V (PR #170992)

risc v clang llvm riscv add

https://www.mail-archive.com/lldb-commits@lists.llvm.org/msg135133.html

[Lldb-commits] [lldb] [lldb][RISCV] Fix GetRegisterInfo to support RISCV-32 (PR #175262)

lldb commits riscv fix support

https://www.mail-archive.com/qemu-devel@nongnu.org/msg1155386.html

[PATCH] target/riscv: Make number of debug triggers configurable

patch target riscv make number

https://www.mail-archive.com/cfe-commits@lists.llvm.org/msg562289.html

[clang] [RISCV] Improve casting between i1 scalable vectors and i8 fixed vectors for...

clang riscv improve casting scalable

https://lists.riscv.org/g/sig-arch-test

sig-arch-test@lists.riscv.org | Home

********************* Architecture Test SIG ********************* Define coverage requirements for RV32I compliance tests, release compliance test format spec,...

sig arch test lists riscv

https://www.ffmpeg.org/doxygen/trunk/riscv_2idctdsp__init_8c_source.html

FFmpeg: libavcodec/riscv/idctdsp_init.c Source File

source file ffmpeg libavcodec riscv init

https://www.ffmpeg.org/doxygen/trunk/dir_a52baa05f7bb40b691e342524e138914.html

FFmpeg: libavcodec/riscv/vvc Directory Reference

ffmpeg libavcodec riscv vvc directory

https://mail-archive.com/llvm-branch-commits@lists.llvm.org/msg47666.html

[llvm-branch-commits] [llvm] [RISCV][MC] Add Q support for Zfa (PR #139508)

llvm branch commits riscv mc

https://mail-archive.com/cfe-commits@lists.llvm.org/msg581708.html

[clang] [RISCV] Correct type lowering of struct of fixed-vector array in VLS (PR #147173)

clang riscv correct type lowering

https://llvm.org/docs/doxygen/RISCVMCObjectFileInfo_8cpp.html

LLVM: lib/Target/RISCV/MCTargetDesc/RISCVMCObjectFileInfo.cpp File Reference

llvm lib target riscv cpp

https://www.llvm.org/doxygen/RISCVRegisterInfo_8cpp_source.html

LLVM: lib/Target/RISCV/RISCVRegisterInfo.cpp Source File

source file llvm lib target riscv

https://llvm.org/docs/doxygen/classllvm_1_1jitlink_1_1ELFLinkGraphBuilder__riscv.html

LLVM: llvm::jitlink::ELFLinkGraphBuilder_riscv< ELFT > Class Template Reference

class template llvm riscv reference

https://www.mail-archive.com/lldb-commits@lists.llvm.org/msg135096.html

[Lldb-commits] [lldb] [lldb][RISCV] Fix GetRegisterInfo to support RISCV-32 (PR #175262)

lldb commits riscv fix support

https://llvm.org/docs/doxygen/RISCVMoveMerger_8cpp_source.html

LLVM: lib/Target/RISCV/RISCVMoveMerger.cpp Source File

source file llvm lib target riscv

https://mail-archive.com/canonical-hw-cert@lists.launchpad.net/msg319444.html

[Canonical-hw-cert] [Bug 2093516] Re: jammy/linux-riscv-6.8: 6.8.0-52.53.1~22.04.1 -proposed tracker

canonical hw cert bug jammy

https://mail-archive.com/qemu-devel@nongnu.org/msg1118185.html

[PATCH v2 0/3] target/riscv: profile handling fixes

patch target riscv profile handling

https://mail-archive.com/cfe-commits@lists.llvm.org/msg538185.html

[clang] [llvm] [RISCV] Add Qualcomn uC Xqcili (load large immediates) extension (PR #130012)

clang llvm riscv add uc

https://llvm.org/docs/doxygen/RISCVMachineFunctionInfo_8h.html

LLVM: lib/Target/RISCV/RISCVMachineFunctionInfo.h File Reference

h file llvm lib target riscv

https://mail-archive.com/cfe-commits@lists.llvm.org/msg562538.html

[clang] 7038d50 - [RISCV] Xqci Extensions v0.11.0 (#137881)

clang riscv extensions