https://docs.amd.com/r/2022.2-English/oslib_rm/Define-XIL_EVENT_ERROR_MASK_PSM_B_NCR
Define XIL_EVENT_ERROR_MASK_PSM_B_NCR - Define XIL_EVENT_ERROR_MASK_PSM_B_NCR - 2022.2 English -...
Definition #define XIL_EVENT_ERROR_MASK_PSM_B_NCR(0x00000008U) Description Error event mask for PSM Firmware can write to trigger register to generate this...
definexileventerrormask
https://docs.amd.com/r/2021.1-English/oslib_rm/Xil_In16
Xil_In16 - Xil_In16 - 2021.1 English - UG643
Performs an input operation for a memory location by reading from the specified address and returning the 16 bit Value read from that address. Prototype INLINE...
xilenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Xil_Out64
Xil_Out64 - Xil_Out64 - 2022.2 English - UG643
Performs an output operation for a memory location by writing the 64 bit Value to the the specified address. Prototype INLINE void Xil_Out64(UINTPTR Addr, u64...
xilenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-XIL_EVENT_ERROR_MASK_CFU
Define XIL_EVENT_ERROR_MASK_CFU - Define XIL_EVENT_ERROR_MASK_CFU - 2022.2 English - UG643
Definition #define XIL_EVENT_ERROR_MASK_CFU(0x00000040U) Description Error event mask for CFU Error.
definexileventerrormask
https://www.chinadaily.com.cn/travel/2017-07/10/content_30058288.htm
Hoh Xil: 51st world heritage site in China[1]- Chinadaily.com.cn
At the 41st session of the UNESCO World Heritage Committee in Poland on July 7, 2017, Hoh Xil was recognized as a new world natural heritage site and became...
world heritage site
https://docs.amd.com/r/2022.2-English/oslib_rm/Xil_L1DCacheStoreLine
Xil_L1DCacheStoreLine - Xil_L1DCacheStoreLine - 2022.2 English - UG643
Store a level 1 Data cache line. If the byte specified by the address (adr) is cached by the Data cache and the cacheline is modified (dirty), the entire...
xilenglish
https://es.mathworks.com/help/sltest/ref/sltest.xil.framework.stimulation-class.html
sltest.xil.framework.Stimulation - Control external input to test bench - MATLAB
Use sltest.xil.framework.Stimulation methods to control input to the test bench.
to testxilframeworkstimulationcontrol
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-XIL_EVENT_ERROR_MASK_PMCSMON0?contentId=i5u_SrQnJmbWCmuwC4c_pQ
Define XIL_EVENT_ERROR_MASK_PMCSMON0 - Define XIL_EVENT_ERROR_MASK_PMCSMON0 - 2022.2 English - UG643
Definition #define XIL_EVENT_ERROR_MASK_PMCSMON0(0x00000080U) Description Error event mask for PMC Temperature Shutdown Alert and Power Supply Failure...
definexileventerrormask
https://nl.mathworks.com/help/sltest/asam-xil-tests.html
ASAM XIL Tests - MATLAB & Simulink
Run tests on third-party ASAM XIL compliant test benches
asamxiltestsmatlabsimulink
https://rss.globenewswire.com/news-release/2022/02/15/2385336/0/en/XIL-Health-Develops-Interactive-Vaccine-Dashboard-with-COVID-Tracker-for-Pharmacies-Nationwide.html
XIL Health Develops Interactive Vaccine Dashboard with
This unique product gives pharmacies access to data on COVID vaccines, flu shots and more, including distributions and reimbursements from payers to assess...
xilhealthdevelopsinteractivevaccine
https://global.chinadaily.com.cn/a/201708/30/WS59bb6da2a310d4d9ab7e77b5_4.html
Hoh Xil in Qinghai connected to the internet - Chinadaily.com.cn
connected to the internethohxilqinghai
https://docs.amd.com/r/2022.2-English/oslib_rm/Xil_DCacheInvalidateRange?contentId=12UZrFO_espy_08Fhmz63w
Xil_DCacheInvalidateRange - Xil_DCacheInvalidateRange - 2022.2 English - UG643
Invalidate the Data cache for the given address range. The cachelines present in the adderss range are cleaned and invalidated Note: In Cortex-A53,...
xilenglish
https://justpaste.it/ToMiXilEnEvd
To Mi Xil En Evd - JustPaste.it
mixilenevdjustpaste
https://events.ccc.de/congress/2024/hub/en/badge/50cf1678-ac97-49cb-be14-2296a9bc1b26/
38C3 - Badge No to AI-Gen Images from Assembly xil.se
no toai genbadge
https://jp.mathworks.com/help/sltest/ref/sltest.xil.framework.acquisition-class.html
sltest.xil.framework.Acquisition - Control signal data logging on test bench and retrieve logged...
Use the sltest.xil.framework.Acquisition class to set up variables on the test bench to log data, control data acquisition, and retrieve the acquired logged...
https://docs.amd.com/r/2021.1-English/oslib_rm/Xil_ExceptionRegisterHandler
Xil_ExceptionRegisterHandler - Xil_ExceptionRegisterHandler - 2021.1 English - UG643
Register a handler for a specific exception. This handler is being called when the processor encounters the specified exception. Prototype void...
xilenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Xil_Out16LE
Xil_Out16LE - Xil_Out16LE - 2022.2 English - UG643
Perform a little-endian output operation for a 16-bit memory location by writing the specified value to the specified address. Prototype INLINE void...
xilenglish
https://www.mathworks.com/help/sltest/ref/sltest.xil.framework.acquisition-class.html
sltest.xil.framework.Acquisition - Control signal data logging on test bench and retrieve logged...
Use the sltest.xil.framework.Acquisition class to set up variables on the test bench to log data, control data acquisition, and retrieve the acquired logged...
https://docs.amd.com/r/2023.1-English/oslib_rm/Xil_ICacheInvalidateLine?contentId=ILz22nDKlWL7ENybZFGl0w
Xil_ICacheInvalidateLine - Xil_ICacheInvalidateLine - 2023.1 English - UG643
Invalidate an instruction cache line. If the instruction specified by the parameter adr is cached by the instruction cache, the cacheline containing that...
xilenglish
https://fr.mathworks.com/help/sltest/asam-xil-tests.html
ASAM XIL Tests - MATLAB & Simulink
Run tests on third-party ASAM XIL compliant test benches
asamxiltestsmatlabsimulink
https://www.mathworks.com/help/sltest/asam-xil-tests.html?s_tid=CRUX_topnav
ASAM XIL Tests - MATLAB & Simulink
Run tests on third-party ASAM XIL compliant test benches
asamxiltestsmatlabsimulink
https://docs.amd.com/r/2022.2-English/oslib_rm/Xil_DisableMPURegionByRegNum?contentId=DKjMzysp6L1is8q6i70_rg
Xil_DisableMPURegionByRegNum - Xil_DisableMPURegionByRegNum - 2022.2 English - UG643
Disables the corresponding region number as passed by the user. Prototype u32 Xil_DisableMPURegionByRegNum(u32 reg_num); Parameters The following table lists...
xilenglish
https://events.ccc.de/congress/2024/hub/en/assembly/xil-se/
38C3 - Assembly xil.se
A (virtual) swedish hackspace.
assemblyxil
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-XIL_EVENT_ERROR_MASK_PLSMON_NCR
Define XIL_EVENT_ERROR_MASK_PLSMON_NCR - Define XIL_EVENT_ERROR_MASK_PLSMON_NCR - 2022.2 English -...
Definition #define XIL_EVENT_ERROR_MASK_PLSMON_NCR(0x00800000U) Description Error event mask for PL Sysmon Non-Correctable Error.
definexileventerrormask
https://blogs.sw.siemens.com/simcenter/digital-twin-xil-testing-testlab-rt/
Executable Digital Twin: XiL testing with Simcenter Testlab RT - Simcenter
Mar 26, 2026 - Do you imagine being able to efficiently test your physical systems in many realistic virtual worlds? Discover Simcenter Testlab RT for XiL testing.
digital twinsimcenter testlabexecutablexiltesting
https://www.mathworks.com/help/driving/ug/automate-real-time-testing-of-highway-lane-following-controller-using-asam-xil.html
Automate Real-Time Testing of Highway Lane Following Controller Using ASAM XIL - MATLAB & Simulink
Deploy a highway lane following controller to a Speedgoatreal-time machine using ASAM XIL standard.
https://fr.mathworks.com/help/sltest/ug/asam-xil-classes-and-methods-supported-by-simulink-test.html
ASAM XIL Classes and Methods Supported by Simulink Test - MATLAB & Simulink
Interface with test cases by using ASAM XIL API classes and methods.
supported byasamxilclassesmethods
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-XIL_EVENT_ERROR_MASK_PMCPAR
Define XIL_EVENT_ERROR_MASK_PMCPAR - Define XIL_EVENT_ERROR_MASK_PMCPAR - 2022.2 English - UG643
Definition #define XIL_EVENT_ERROR_MASK_PMCPAR(0x00000010U) Description Error event mask for PMC Switch and PMC IOU Parity Errors.
definexileventerrormask
https://docs.amd.com/r/2023.1-English/oslib_rm/Xil_DisableMMU?contentId=ESwDZ4T9CM9E3Il066Np8A
Xil_DisableMMU - Xil_DisableMMU - 2023.1 English - UG643
Disable MMU for Cortex A53 processors in 32-bit mode. This function invalidates the TLBs, Branch Predictor Array and flushed the data cache before disabling...
xilenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/xil_printf?contentId=Po_7LvRO7GWsn_Kg9dVyeg
xil_printf - xil_printf - 2021.1 English - UG643
xil_printf() is a light-weight implementation of printf. It is much smaller in size (only 1 Kb). It does not have support for floating point numbers....
xilprintfenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-Xil_DCacheFlushRange?contentId=jOfw7O5BwAiHQ_lpFq~hmA
#Define Xil_DCacheFlushRange - #Define Xil_DCacheFlushRange - 2022.2 English - UG643
Description Flush the Data cache for the given address range. If the bytes specified by the address (adr) are cached by the Data cache, the cacheline...
definexilenglish
https://www.mathworks.com/help/sltest/ug/asam-xil-classes-and-methods-supported-by-simulink-test.html
ASAM XIL Classes and Methods Supported by Simulink Test - MATLAB & Simulink
Interface with test cases by using ASAM XIL API classes and methods.
supported byasamxilclassesmethods
https://docs.amd.com/r/2021.1-English/oslib_rm/Xil_GetMPUFreeRegMask?contentId=FgDtvDba8w1m5LcVSto0aw
Xil_GetMPUFreeRegMask - Xil_GetMPUFreeRegMask - 2021.1 English - UG643
Returns the total number of free MPU regions available in the form of a mask. A bit of 1 in the returned 16 bit value represents the corresponding region...
xilenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-XIL_EVENT_ERROR_MASK_SSIT3?contentId=H2edMYQm4WWKfCIZJIgntA
Define XIL_EVENT_ERROR_MASK_SSIT3 - Define XIL_EVENT_ERROR_MASK_SSIT3 - 2022.2 English - UG643
Definition #define XIL_EVENT_ERROR_MASK_SSIT3(0x20000000U) Description Error event mask for SSIT Error from Slave SLR1, Only used in Master SLR.
definexileventerrormask
https://docs.amd.com/r/2023.1-English/oslib_rm/Xil_L1DCacheFlush?contentId=Gnelbcd9MAA3IvUOs2iQVA
Xil_L1DCacheFlush - Xil_L1DCacheFlush - 2023.1 English - UG643
Flush the level 1 Data cache. Note: In Cortex A9, there is no cp instruction for flushing the whole D-cache. Need to flush each line. Prototype void...
xilenglish
https://au.mathworks.com/help/sltest/asam-xil-tests.html
ASAM XIL Tests - MATLAB & Simulink
Run tests on third-party ASAM XIL compliant test benches
asamxiltestsmatlabsimulink
https://docs.amd.com/r/2023.1-English/oslib_rm/Xil_SetMPURegionByRegNum?contentId=aPQpjx7Z9~inlpn5_9HRew
Xil_SetMPURegionByRegNum - Xil_SetMPURegionByRegNum - 2023.1 English - UG643
Enables the corresponding region number as passed by the user. Prototype u32 Xil_SetMPURegionByRegNum(u32 reg_num, INTPTR addr, u64 size, u32 attrib);...
xilenglish
https://www.mathworks.com/help/sltest/ref/sltest.xil.framework.frameworkconfiguration-class.html
sltest.xil.framework.FrameworkConfiguration - Configure test bench ports and variable mapping -...
Use the sltest.xil.framework.FrameworkConfiguration methods to add ports and map host variables to variables on the test bench.
test benchxilframeworkconfigure
https://fr.mathworks.com/help/sltest/ug/create-and-run-tests-using-the-asam-xil-standard.html
Create and Run Tests Using the ASAM XIL Standard - MATLAB & Simulink
Use the ASAM XIL standard to run tests on an external test bench.
run testscreateusing
https://docs.amd.com/r/2021.1-English/oslib_rm/Xil_SetMBFrequency?contentId=lQbozE_ILntl3KomUUFUxg
Xil_SetMBFrequency - Xil_SetMBFrequency - 2021.1 English - UG643
Sets variable which stores Microblaze frequency value. Note: It must be called after runtime change in Microblaze frequency, failing to do so would result in...
xilenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Xil_DCacheDisable?contentId=jx2YrVXgw0r9ny2jbJaJKw
Xil_DCacheDisable - Xil_DCacheDisable - 2021.1 English - UG643
Disable the Data cache. Prototype void Xil_DCacheDisable(void); Returns None.
xilenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-Xil_ICacheInvalidate
#Define Xil_ICacheInvalidate - #Define Xil_ICacheInvalidate - 2022.2 English - UG643
Description Invalidate the entire instruction cache.
definexilenglish
https://it.mathworks.com/help/sltest/asam-xil-tests.html
ASAM XIL Tests - MATLAB & Simulink
Run tests on third-party ASAM XIL compliant test benches
asamxiltestsmatlabsimulink
https://docs.amd.com/r/2021.1-English/oslib_rm/Xil_ExceptionNullHandler?contentId=~6NHPz_BJCiI2MleUiAecg
Xil_ExceptionNullHandler - Xil_ExceptionNullHandler - 2021.1 English - UG643
This function is a stub handler that is the default handler that gets called if the application has not setup a handler for a specific exception. The function...
xilenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Xil_DCacheFlush?contentId=EgcE_rPXR7Xld2h2WJIxVg
Xil_DCacheFlush - Xil_DCacheFlush - 2022.2 English - UG643
Flush the Data cache. Prototype void Xil_DCacheFlush(void); Returns None.
xilenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Xil_TestDCacheRange?contentId=XJ4wTYDugKDBkBkN0NWWfQ
Xil_TestDCacheRange - Xil_TestDCacheRange - 2021.1 English - UG643
Perform DCache range related API test such as Xil_DCacheFlushRange and Xil_DCacheInvalidateRange. This test function writes a constant value to the Data array,...
xilenglish