Robuta

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: Improve readanylane combines in regbanklegalize (PR...

https://mail-archive.com/llvm-branch-commits@lists.llvm.org/msg50026.html

llvm branch commits amdgpu improve

https://llvm.org/docs/doxygen/SIFixVGPRCopies_8cpp_source.html

LLVM: lib/Target/AMDGPU/SIFixVGPRCopies.cpp Source File

LLVM: lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h Source File

https://llvm.org/docs/doxygen/AMDGPUISelDAGToDAG_8h_source.html

LLVM: lib/Target/AMDGPU/TargetInfo Directory Reference

https://llvm.org/docs/doxygen/dir_c9171f2c0f5e8c5077bd9fc5c6f70647.html

llvm lib target amdgpu directory

https://llvm.org/docs/doxygen/R600EmitClauseMarkers_8cpp_source.html

LLVM: lib/Target/AMDGPU/R600EmitClauseMarkers.cpp Source File

LLVM: lib/Target/AMDGPU/AMDGPUFrameLowering.h File Reference

https://llvm.org/docs/doxygen/AMDGPUFrameLowering_8h.html

LLVM: lib/Target/AMDGPU/AMDGPUPrepareAGPRAlloc.h File Reference

https://llvm.org/docs/doxygen/AMDGPUPrepareAGPRAlloc_8h.html

LLVM: lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp File Reference

https://llvm.org/docs/doxygen/AMDGPUMCResourceInfo_8cpp.html

LLVM: llvm::AMDGPU::ClusterDimsAttr Class Reference

https://llvm.org/doxygen/classllvm_1_1AMDGPU_1_1ClusterDimsAttr.html

llvm amdgpu class reference

https://mail-archive.com/llvm-branch-commits@lists.llvm.org/msg50009.html

[llvm-branch-commits] [llvm] [AMDGPU] New RegBanKSelect: Add S128 types (PR #142601)

llvm branch commits amdgpu new

https://www.mail-archive.com/cfe-commits@lists.llvm.org/msg540675.html

[clang] [libc] [llvm] Reapply "[AMDGPU] Use COV6 by default (#118515)" (PR #130963)

by default clang libc llvm amdgpu

https://llvm.org/docs/doxygen/AMDGPUUnifyDivergentExitNodes_8h_source.html

LLVM: lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h Source File

[clang] [libc] [llvm] Reapply "[AMDGPU] Use COV6 by default (#118515)" (PR #130963)

https://www.mail-archive.com/cfe-commits@lists.llvm.org/msg538172.html

by default clang libc llvm amdgpu

https://llvm.org/doxygen/R600ISelDAGToDAG_8cpp.html

LLVM: lib/Target/AMDGPU/R600ISelDAGToDAG.cpp File Reference

LLVM: lib/Target/AMDGPU/AMDGPUSelectionDAGInfo.h Source File

https://llvm.org/docs/doxygen/AMDGPUSelectionDAGInfo_8h_source.html

LLVM: lib/Target/AMDGPU/SIShrinkInstructions.h File Reference

https://llvm.org/docs/doxygen/SIShrinkInstructions_8h.html

LLVM: lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp File Reference

https://llvm.org/docs/doxygen/AMDGPUTargetObjectFile_8cpp.html

LLVM: lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp File Reference

https://llvm.org/docs/doxygen/AMDGPURegisterBankInfo_8cpp.html

LLVM: lib/Target/AMDGPU/GCNRewritePartialRegUses.cpp Source File

https://llvm.org/doxygen/GCNRewritePartialRegUses_8cpp_source.html

LLVM: lib/Target/AMDGPU/R600ISelLowering.h Source File

https://llvm.org/docs/doxygen/R600ISelLowering_8h_source.html

LLVM: lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp Source File

https://www.llvm.org/doxygen/AMDGPULowerKernelAttributes_8cpp_source.html

[llvm-branch-commits] [llvm] [AMDGPU] New RegBanKSelect: Add S128 types (PR #142601)

https://mail-archive.com/llvm-branch-commits@lists.llvm.org/msg49984.html

llvm branch commits amdgpu new

https://llvm.org/docs/doxygen/R600InstrInfo_8cpp.html

LLVM: lib/Target/AMDGPU/R600InstrInfo.cpp File Reference

[llvm-branch-commits] [clang] [llvm] [AMDGPU] v_cvt_scalef32_sr_pk16_* gfx1250 instructions (PR...

https://www.mail-archive.com/llvm-branch-commits@lists.llvm.org/msg56663.html

llvm branch commits clang amdgpu

https://llvm.org/docs/doxygen/AMDGPUArgumentUsageInfo_8cpp.html

LLVM: lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp File Reference

LLVM: lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp File Reference

https://llvm.org/doxygen/AMDGPUInstructionSelector_8cpp.html

"GFX1153" Target Spotted in AMDGPU Library Amendment, RDNA 3.5 Again Linked to...

https://www.techpowerup.com/334691/gfx1153-target-spotted-in-amdgpu-library-amendment-rdna-3-5-again-linked-to-medusa-point-apu

At the tail end of 2024, AMD technical staffers added the "GFX1153" target to their first-party GPU supported chip list. Almost three months later,...

quot target spotted amdgpu library

https://mail-archive.com/cfe-commits@lists.llvm.org/msg566401.html

[clang] [llvm] [mlir] [AMDGPU] Add a new amdgcn.load.to.lds intrinsic (PR #137425)

a new clang llvm mlir amdgpu

https://llvm.org/docs/doxygen/AMDGPURemoveIncompatibleFunctions_8h_source.html

LLVM: lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.h Source File

LLVM: llvm::AMDGPU::MIMGLZMappingInfo Struct Reference

https://llvm.org/doxygen/structllvm_1_1AMDGPU_1_1MIMGLZMappingInfo.html

llvm amdgpu struct reference

https://llvm.org/docs/doxygen/SIOptimizeVGPRLiveRange_8cpp_source.html

LLVM: lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp Source File

LLVM: lib/Target/AMDGPU/GCNNSAReassign.h File Reference

https://llvm.org/docs/doxygen/GCNNSAReassign_8h.html