fsycl - Robuta Search

https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-2/fsycl-device-lib.html fsycl-device-lib Enables or disables certain device libraries for a SYCL* target. fsycl device lib https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2024-1/fsycl-device-code-split.html fsycl-device-code-split Specifies a SYCL* device code module assembly. device code fsycl split https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-2/fsycl-pstl-offload.html fsycl-pstl-offload Enables the automatic offloading of C++ standard parallel algorithms to a SYCL device. fsycl pstl offload https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2023-2/fsycl-device-lib.html fsycl-device-lib Enables or disables certain device libraries for a SYCL* target. fsycl device lib https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2024-0/fsycl-device-lib.html fsycl-device-lib Enables or disables certain device libraries for a SYCL* target. fsycl device lib https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-1/fsycl-enable-function-pointers.html fsycl-enable-function-pointers Enables function pointers and support for virtual functions for SYCL kernels and device functions. This is an experimental feature. fsycl enable function pointers https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-0/fsycl-esimd-force-stateless-mem.html fsycl-esimd-force-stateless-mem Determines whether the compiler enforces stateless memory accesses within ESIMD kernels on the target device. This is an experimental feature. fsycl force stateless mem https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2023-2/fsycl-unnamed-lambda.html fsycl-unnamed-lambda Enables unnamed SYCL* lambda kernels. fsycl unnamed lambda https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2023-1/fsycl-force-target.html fsycl-force-target Forces the compiler to use the specified target triple device when extracting device code from any given objects on the command line. fsycl force target https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2024-2/fsycl-link.html fsycl-link Tells the compiler to perform a partial link of device binaries to be used with Field Programmable Gate Array (FPGA). fsycl https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-0/fsycl-fp64-conv-emu.html fsycl-fp64-conv-emu Tells the compiler to use fp64 partial emulation for kernels with only fp64 conversion operations and no fp64 computation operations. It requires an Intel GPU... fsycl fp64 conv emu https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2024-1/fsycl-id-queries-fit-in-int.html fsycl-id-queries-fit-in-int Tells the compiler to assume that SYCL ID queries fit within MAX_INT. fit in fsycl id queries int https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-1/fsycl-device-code-split.html fsycl-device-code-split Specifies a SYCL* device code module assembly. device code fsycl split https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-2/fsycl-device-code-split.html fsycl-device-code-split Specifies a SYCL* device code module assembly. device code fsycl split https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-2/fsycl-max-parallel-link-jobs.html fsycl-max-parallel-link-jobs Tells the compiler that it can simultaneously spawn up to the specified number of processes to perform actions required to link SYCL applications. This is an... fsycl max parallel jobs https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2024-2/fsycl-device-code-split.html fsycl-device-code-split Specifies a SYCL* device code module assembly. device code fsycl split https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-1/fsycl-unnamed-lambda.html fsycl-unnamed-lambda Enables unnamed SYCL* lambda kernels. fsycl unnamed lambda https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2024-2/fsycl-id-queries-fit-in-int.html fsycl-id-queries-fit-in-int Tells the compiler to assume that SYCL ID queries fit within MAX_INT. fit in fsycl id queries int https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2023-0/fsycl-id-queries-fit-in-int.html fsycl-id-queries-fit-in-int Tells the compiler to assume that SYCL ID queries fit within MAX_INT. fit in fsycl id queries int https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2023-0/fsycl-device-code-split.html fsycl-device-code-split Specifies a SYCL* device code module assembly. device code fsycl split https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2024-2/fsycl-optimize-non-user-code.html fsycl-optimize-non-user-code Tells the compiler to optimize SYCL framework utility functions and to leave the kernel code unoptimized for further debugging. fsycl optimize non user code https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-0/fsycl-device-obj.html fsycl-device-obj Lets you specify the format of device code stored in a resulting object. This is an experimental feature. fsycl device obj https://www.intel.com/content/www/us/en/docs/fortran-compiler/developer-guide-reference/2025-2/fsycl-dead-args-optimization.html fsycl-dead-args-optimization Enables elimination of SYCL dead kernel arguments. fsycl dead args optimization https://www.intel.com/content/www/us/en/docs/fortran-compiler/developer-guide-reference/2025-2/fsycl-device-code-split.html fsycl-device-code-split Specifies a SYCL* device code module assembly. device code fsycl split https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-2/fsycl-help.html fsycl-help Causes help information to be emitted from the device compiler backend. fsycl help https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2024-1/fsycl.html fsycl Enables a program to be compiled as a SYCL program rather than as plain C++11 program. fsycl https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-2/fsycl-link.html fsycl-link Tells the compiler to perform a partial link of device binaries. fsycl https://www.intel.com/content/www/us/en/docs/fortran-compiler/developer-guide-reference/2025-2/fsycl-targets.html fsycl-targets Tells the compiler to generate code for specified device targets. This option is only valid for linking against SYCL-based objects. fsycl targets https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2023-2/fsycl-esimd-force-stateless-mem.html fsycl-esimd-force-stateless-mem Determines whether the compiler enforces stateless memory accesses within ESIMD kernels on the target device. This is an experimental feature. fsycl force stateless mem https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2023-1/fsycl-explicit-simd.html fsycl-explicit-simd Enables or disables the experimental Explicit SIMD SYCL* extension. This is a deprecated option that may be removed in a future release. fsycl explicit simd https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2024-2/fsycl-device-only.html fsycl-device-only Tells the compiler to generate a device-only binary. fsycl device https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-2/fsycl-early-optimizations.html fsycl-early-optimizations Enables LLVM-related optimizations before SPIR-V* generation. fsycl early optimizations https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2023-0/fsycl-help.html fsycl-help Causes help information to be emitted from the device compiler backend. fsycl help https://www.intel.com/content/www/us/en/docs/fortran-compiler/developer-guide-reference/2025-2/fsycl-device-lib.html fsycl-device-lib Enables or disables certain device libraries for a SYCL* target. fsycl device lib https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2023-2/fsycl-explicit-simd.html fsycl-explicit-simd Enables or disables the experimental Explicit SIMD SYCL* extension. This is a deprecated option that may be removed in a future release. fsycl explicit simd https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2023-1/fsycl-link-targets.html fsycl-link-targets Tells the compiler to link only device code. This is a deprecated option that may be removed in a future release. fsycl targets https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2024-0/fsycl-esimd-force-stateless-mem.html fsycl-esimd-force-stateless-mem Determines whether the compiler enforces stateless memory accesses within ESIMD kernels on the target device. This is an experimental feature. fsycl force stateless mem https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2023-2/fsycl-id-queries-fit-in-int.html fsycl-id-queries-fit-in-int Tells the compiler to assume that SYCL ID queries fit within MAX_INT. fit in fsycl id queries int https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2023-2/fsycl-rdc.html fsycl-rdc Determines whether the compiler generates device code in one module (normal behavior) or it generates separate device code per source. fsycl rdc https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-0/fsycl-device-only.html fsycl-device-only Tells the compiler to generate a device-only binary. fsycl device https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2024-1/fsycl-esimd-force-stateless-mem.html fsycl-esimd-force-stateless-mem Determines whether the compiler enforces stateless memory accesses within ESIMD kernels on the target device. This is an experimental feature. fsycl force stateless mem https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2024-0/fsycl-link-targets.html fsycl-link-targets Tells the compiler to link only device code. This is a deprecated option that may be removed in a future release. fsycl targets https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2024-2/fsycl-force-target.html fsycl-force-target Forces the compiler to use the specified target triple device when extracting device code from any given objects on the command line. fsycl force target https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-2/fsycl.html fsycl Enables a program to be compiled as a SYCL program rather than as plain C++11 program. fsycl https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2023-0/fsycl-link.html fsycl-link Tells the compiler to perform a partial link of device binaries to be used with Field Programmable Gate Array (FPGA). fsycl https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2024-0/fsycl-device-only.html fsycl-device-only Tells the compiler to generate a device-only binary. fsycl device https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-2/fsycl-force-target.html fsycl-force-target Forces the compiler to use the specified target triple device when extracting device code from any given objects on the command line. fsycl force target https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-2/fsycl-device-only.html fsycl-device-only Tells the compiler to generate a device-only binary. fsycl device https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-1/fsycl-host-compiler.html fsycl-host-compiler Tells the compiler to use the specified compiler for the host compilation of the overall offloading compilation that is performed. fsycl host compiler https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-1/fsycl-use-bitcode.html fsycl-use-bitcode Tells the compiler to produce device code in LLVM Intermediate Representation (IR) bitcode format into fat objects. fsycl use bitcode https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-2/fsycl-explicit-simd.html fsycl-explicit-simd Enables or disables the experimental Explicit SIMD SYCL* extension. This is a deprecated option that may be removed in a future release. fsycl explicit simd https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2024-1/fsycl-device-only.html fsycl-device-only Tells the compiler to generate a device-only binary. fsycl device https://www.intel.com/content/www/us/en/docs/fortran-compiler/developer-guide-reference/2023-0/fsycl-link-huge-device-code.html fsycl-link-huge-device-code Tells the compiler to place device code later in the linked binary. This is to prevent 32-bit PC-relative relocations between surrounding Executable and... fsycl huge device code https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2023-2/fsycl-device-only.html fsycl-device-only Tells the compiler to generate a device-only binary. fsycl device https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2023-2/fsycl-use-bitcode.html fsycl-use-bitcode Tells the compiler to produce device code in LLVM Intermediate Representation (IR) bitcode format into fat objects. fsycl use bitcode https://www.intel.com/content/www/us/en/docs/fortran-compiler/developer-guide-reference/2025-0/fsycl.html fsycl Enables Fortran to perform the SYCL offload device linking steps for potential SYCL-based fat objects or libraries. fsycl https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2024-2/fsycl-help.html fsycl-help Causes help information to be emitted from the device compiler backend. fsycl help https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2025-0/fsycl-help.html fsycl-help Causes help information to be emitted from the device compiler backend. fsycl help https://www.intel.com/content/www/us/en/docs/dpcpp-cpp-compiler/developer-guide-reference/2023-1/fsycl-rdc.html fsycl-rdc Determines whether the compiler generates device code in one module (normal behavior) or it generates separate device code per source. fsycl rdc