https://docs.amd.com/r/2021.1-English/oslib_rm/Xil_In16
Xil_In16 - Xil_In16 - 2021.1 English - UG643
Performs an input operation for a memory location by reading from the specified address and returning the 16 bit Value read from that address. Prototype INLINE...
xilenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Xil_Out64
Xil_Out64 - Xil_Out64 - 2022.2 English - UG643
Performs an output operation for a memory location by writing the 64 bit Value to the the specified address. Prototype INLINE void Xil_Out64(UINTPTR Addr, u64...
xilenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-XIL_EVENT_ERROR_MASK_CFU
Define XIL_EVENT_ERROR_MASK_CFU - Define XIL_EVENT_ERROR_MASK_CFU - 2022.2 English - UG643
Definition #define XIL_EVENT_ERROR_MASK_CFU(0x00000040U) Description Error event mask for CFU Error.
definexileventerrormask
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-PM_DEV_GT_7
Define PM_DEV_GT_7 - Define PM_DEV_GT_7 - 2022.2 English - UG643
Definition #define PM_DEV_GT_7(0x1862c050U) Description Versal Device Nodes
definepmdevgtenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Enumeration-XSKEfusePl_ErrorCodes
Enumeration XSKEfusePl_ErrorCodes - Enumeration XSKEfusePl_ErrorCodes - 2022.2 English - UG643
Table 1. Enumeration XSKEfusePl_ErrorCodes Values Value Description XSK_EFUSEPL_ERROR_NONE 0 No error. XSK_EFUSEPL_ERROR_ROW_NOT_ZERO 0x10 Row is not zero....
enumerationerrorcodesenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-PM_STMIC_LMIO_9
Define PM_STMIC_LMIO_9 - Define PM_STMIC_LMIO_9 - 2022.2 English - UG643
Definition #define PM_STMIC_LMIO_9(0x1410400aU) Description Versal MIO Nodes
definepmenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/pm_init_suspend?contentId=9Coqy3Xd2jEtQWN6JeZfew
pm_init_suspend - pm_init_suspend - 2021.1 English - UG643
pminitsuspendenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_RST_PDMA_RST1?contentId=2W17VD8IcaU1iSKZiDbeCg
Define PM_RST_PDMA_RST1 - Define PM_RST_PDMA_RST1 - 2021.1 English - UG643
Definition #define PM_RST_PDMA_RST1(0xc410024U) Description Versal Reset Nodes
definepmrstpdmaenglish
https://docs.amd.com/r/2023.1-English/oslib_rm/XSecure_RsaPrivateDecrypt?contentId=2wwWPse39_GJ9mLMYAikZA
XSecure_RsaPrivateDecrypt - XSecure_RsaPrivateDecrypt - 2023.1 English - UG643
This function handles the RSA decryption with the private key components provided when initializing the RSA cryptographic core with the XSecure_RsaInitialize...
english
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_CLK_MUXED_IRO_DIV2
Define PM_CLK_MUXED_IRO_DIV2 - Define PM_CLK_MUXED_IRO_DIV2 - 2021.1 English - UG643
Definition #define PM_CLK_MUXED_IRO_DIV2(0x820802dU) Description Versal Clock Nodes
definepmclkiroenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_RST_L2_0
Define PM_RST_L2_0 - Define PM_RST_L2_0 - 2021.1 English - UG643
Definition #define PM_RST_L2_0(0xc410058U) Description Versal Reset Nodes
definepmrstenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_DEV_SDIO_1
Define PM_DEV_SDIO_1 - Define PM_DEV_SDIO_1 - 2021.1 English - UG643
Definition #define PM_DEV_SDIO_1(0x1822402fU) Description Versal Device Nodes
definepmdevsdioenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/BSP-Configuration-Settings
BSP Configuration Settings - BSP Configuration Settings - 2022.2 English - UG643
XilTimer provides the following user configuration BSP settings. Table 1. BSP Configuration Settings Parameter Name Type Description sleep timer...
configuration settingsbspenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_STMIC_LMIO_2?contentId=0J2sXcff44snAJ8KMIdaOA
Define PM_STMIC_LMIO_2 - Define PM_STMIC_LMIO_2 - 2021.1 English - UG643
Definition #define PM_STMIC_LMIO_2(0x14104003U) Description Versal MIO Nodes
definepmenglish
https://docs.amd.com/r/en-US/oslib_rm/XilSkey-Library-v7.8
XilSkey Library v7.8 - XilSkey Library v7.8 - 2025.2 English - UG643
libraryenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_CLK_RPU_PLL_OUT?contentId=k0Ue8RlfFU4O6AlGYvWAeQ
Define PM_CLK_RPU_PLL_OUT - Define PM_CLK_RPU_PLL_OUT - 2021.1 English - UG643
Definition #define PM_CLK_RPU_PLL_OUT(0x8208015U) Description Versal Clock Nodes
definepmclkrpupll
https://docs.amd.com/r/2023.1-English/oslib_rm/XFpga_GetPlConfigData?contentId=TVLOoQdJ_xtAM9gpv1C8Vw
XFpga_GetPlConfigData - XFpga_GetPlConfigData - 2023.1 English - UG643
This function provides functionality to read back the PL configuration data. Note: This API is not supported for the Versal platform. Prototype u32...
english
https://docs.amd.com/r/2021.1-English/oslib_rm/xemacif_input_thread
xemacif_input_thread - xemacif_input_thread - 2021.1 English - UG643
In the socket mode, the application thread must launch a separate thread to receive the input packets. This performs the same work as the RAW mode function,...
inputthreadenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Enumeration-XPmInitFunctions?contentId=~HMjHIo7tWziSp6ZafbKZw
Enumeration XPmInitFunctions - Enumeration XPmInitFunctions - 2022.2 English - UG643
PM init node functions Table 1. Enumeration XPmInitFunctions Values Value Description FUNC_INIT_START Function ID INIT_START FUNC_INIT_FINISH Function ID...
enumerationenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_DEV_DDRMC_3
Define PM_DEV_DDRMC_3 - Define PM_DEV_DDRMC_3 - 2021.1 English - UG643
Definition #define PM_DEV_DDRMC_3(0x18520048U) Description Versal Device Nodes
definepmdevenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Xil_L1DCacheStoreLine
Xil_L1DCacheStoreLine - Xil_L1DCacheStoreLine - 2022.2 English - UG643
Store a level 1 Data cache line. If the byte specified by the address (adr) is cached by the Data cache and the cacheline is modified (dirty), the entire...
xilenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_DEV_GEM_0
Define PM_DEV_GEM_0 - Define PM_DEV_GEM_0 - 2021.1 English - UG643
Definition #define PM_DEV_GEM_0(0x18224019U) Description Versal Device Nodes
definepmdevgemenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-XIL_EVENT_ERROR_MASK_PMCSMON0?contentId=i5u_SrQnJmbWCmuwC4c_pQ
Define XIL_EVENT_ERROR_MASK_PMCSMON0 - Define XIL_EVENT_ERROR_MASK_PMCSMON0 - 2022.2 English - UG643
Definition #define XIL_EVENT_ERROR_MASK_PMCSMON0(0x00000080U) Description Error event mask for PMC Temperature Shutdown Alert and Power Supply Failure...
definexileventerrormask
https://docs.amd.com/r/2021.1-English/oslib_rm/XPm_GetBootStatus?contentId=U_0e~l2FQjGgWkl~TGYpyQ
XPm_GetBootStatus - XPm_GetBootStatus - 2021.1 English - UG643
This Function returns information about the boot reason. If the boot is not a system startup but a resume, power down request bitfield for this processor will...
xpmenglish
https://docs.amd.com/r/2023.1-English/oslib_rm/AES-GCM-Usage-to-decrypt-Boot-Image?contentId=eZIdvccwBDeXahpPE7ipMQ
AES-GCM Usage to decrypt Boot Image - AES-GCM Usage to decrypt Boot Image - 2023.1 English - UG643
The Multiple key(Key Rolling) or Single key encrypted images will have the same format. The images include: Secure header - This includes the dummy AES key of...
aesgcmusagedecrypt
https://docs.amd.com/r/2022.2-English/oslib_rm/XPm_PinCtrlAction?contentId=AcS7E5ccKtyz7KHHu6CqWQ
XPm_PinCtrlAction - XPm_PinCtrlAction - 2022.2 English - UG643
Locally used function to request or release a pin control. Prototype XStatus XPm_PinCtrlAction(const u32 pin, const enum XPmApiId api); Parameters The...
xpmenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_RST_CMN?contentId=_4a4~QdAbO2ry_zB9U9IHg
Define PM_RST_CMN - Define PM_RST_CMN - 2021.1 English - UG643
Definition #define PM_RST_CMN(0xc410057U) Description Versal Reset Nodes
definepmrstcmnenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_DEV_TTC_2?contentId=74W6_xXpdBu8RrvyhsfcQg
Define PM_DEV_TTC_2 - Define PM_DEV_TTC_2 - 2021.1 English - UG643
Definition #define PM_DEV_TTC_2(0x18224026U) Description Versal Device Nodes
definepmdevttcenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_POWER_OCM_0?contentId=WXliniv01qRjICU4jpUxkg
Define PM_POWER_OCM_0 - Define PM_POWER_OCM_0 - 2021.1 English - UG643
Definition #define PM_POWER_OCM_0(0x410400cU) Description Versal Power Nodes
definepmpowerocmenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Xil_DCacheInvalidateRange?contentId=12UZrFO_espy_08Fhmz63w
Xil_DCacheInvalidateRange - Xil_DCacheInvalidateRange - 2022.2 English - UG643
Invalidate the Data cache for the given address range. The cachelines present in the adderss range are cleaned and invalidated Note: In Cortex-A53,...
xilenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/XPm_GetApiVersion
XPm_GetApiVersion - XPm_GetApiVersion - 2021.1 English - UG643
This function is used to request the version number of the API running on the platform management controller. Prototype XStatus XPm_GetApiVersion(u32...
xpmenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_CLK_GEM_TSU_LB?contentId=SiPLizIVHoae6kCNbwL9Rw
Define PM_CLK_GEM_TSU_LB - Define PM_CLK_GEM_TSU_LB - 2021.1 English - UG643
Definition #define PM_CLK_GEM_TSU_LB(0x820802cU) Description Versal Clock Nodes
definepmclkgemtsu
https://docs.amd.com/r/2021.1-English/oslib_rm/XSecure_RsaInitialize?contentId=TDWjKCuhpdvr0M8Q2aocCQ
XSecure_RsaInitialize - XSecure_RsaInitialize - 2021.1 English - UG643
This function initializes a a XSecure_Rsa structure with the default values required for operating the RSA cryptographic engine. Note: Modulus, ModExt and...
english
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-PM_RST_OCM
Define PM_RST_OCM - Define PM_RST_OCM - 2022.2 English - UG643
Definition #define PM_RST_OCM(0xc410028U) Description Versal Reset Nodes
definepmrstocmenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_CLK_GEM_TSU_LB
Define PM_CLK_GEM_TSU_LB - Define PM_CLK_GEM_TSU_LB - 2021.1 English - UG643
Definition #define PM_CLK_GEM_TSU_LB(0x820802cU) Description Versal Clock Nodes
definepmclkgemtsu
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-PM_RST_AIE_ARRAY?contentId=DOxHvQulO0hcTtc_o5m3ZQ
Define PM_RST_AIE_ARRAY - Define PM_RST_AIE_ARRAY - 2022.2 English - UG643
Definition #define PM_RST_AIE_ARRAY(0xc10405eU) Description Versal Reset Nodes
definepmrstaiearray
https://docs.amd.com/r/2021.1-English/oslib_rm/AES-GCM-Usage-to-decrypt-Boot-Image?contentId=iIYR9x2iIsnWLHHQ4CFeQw
AES-GCM Usage to decrypt Boot Image - AES-GCM Usage to decrypt Boot Image - 2021.1 English - UG643
The Multiple key(Key Rolling) or Single key encrypted images will have the same format. The images include: Secure header - This includes the dummy AES key of...
aesgcmusagedecrypt
https://docs.amd.com/r/2022.2-English/oslib_rm/XSemNpiStatus?contentId=vsyTnxfWM04lQv07olP31g
XSemNpiStatus - XSemNpiStatus - 2022.2 English - UG643
NPI Status structure to store the data read from PMC RAM registers. This structure provides: NPI scan status information NPI descriptor slave skip counter...
english
https://docs.amd.com/r/2021.1-English/oslib_rm/Arm-Cortex-A9-Processor-Boot-Code?contentId=6ZIFXJf~HS2eTfPmxAyinw
Arm Cortex-A9 Processor Boot Code - Arm Cortex-A9 Processor Boot Code - 2021.1 English - UG643
The boot code performs minimum configuration which is required for an application to run starting from processor reset state of the processor. Below is a...
arm cortexprocessorbootcodeenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/XPm_Master?contentId=W0xGvyZJ~vz2pDCdm6ZKJw
XPm_Master - XPm_Master - 2021.1 English - UG643
xpmmasterenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-PM_VERSION?contentId=Jfapr0ar1TegKwnY3BNtsw
Define PM_VERSION - Define PM_VERSION - 2022.2 English - UG643
definepmversionenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_STMIC_PMIO_16?contentId=4HfX6xbUEgl1TYApfuLZcg
Define PM_STMIC_PMIO_16 - Define PM_STMIC_PMIO_16 - 2021.1 English - UG643
Definition #define PM_STMIC_PMIO_16(0x1410802bU) Description Versal MIO Nodes
definepmenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-XPM_DLL_RESET_ASSERT?contentId=aa9UscW4b2uwCnXhQjHisQ
Define XPM_DLL_RESET_ASSERT - Define XPM_DLL_RESET_ASSERT - 2022.2 English - UG643
Definition #define XPM_DLL_RESET_ASSERT(0U) Description Dll reset type
definexpmdllresetassert
https://docs.amd.com/r/2022.2-English/oslib_rm/XilSKey_ZynqMp_EfusePs_ReadPpk0Hash
XilSKey_ZynqMp_EfusePs_ReadPpk0Hash - XilSKey_ZynqMp_EfusePs_ReadPpk0Hash - 2022.2 English - UG643
This function is used to read the PPK0 hash from an eFUSE or eFUSE cache. Note: It is highly recommended to read from eFuse cache. Because reading from efuse...
english
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-PM_STMIC_PMIO_28?contentId=fn8q7JfpCGGfVnETaYMJ2g
Define PM_STMIC_PMIO_28 - Define PM_STMIC_PMIO_28 - 2022.2 English - UG643
Definition #define PM_STMIC_PMIO_28(0x14108037U) Description Versal MIO Nodes
definepmenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_CLK_GEM0_TX?contentId=qYRkQsLGtbTDIGeRF0d_wg
Define PM_CLK_GEM0_TX - Define PM_CLK_GEM0_TX - 2021.1 English - UG643
Definition #define PM_CLK_GEM0_TX(0x8208031U) Description Versal Clock Nodes
definepmclktxenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/XilSKey_UsrFuses?contentId=EXO2szqHSaAf2u9o4j_Ceg
XilSKey_UsrFuses - XilSKey_UsrFuses - 2021.1 English - UG643
english
https://docs.amd.com/r/2021.1-English/oslib_rm/Enumeration-XPmReset?contentId=re2nNjF2B7r6e8elbpISaA
Enumeration XPmReset - Enumeration XPmReset - 2021.1 English - UG643
PM Reset Line IDs Table 1. Enumeration XPmReset Values Value Description XILPM_RESET_PCIE_CFG Reset ID PCIE_CFG XILPM_RESET_PCIE_BRIDGE Reset ID PCIE_BRIDGE...
enumerationenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Xil_ExceptionRegisterHandler
Xil_ExceptionRegisterHandler - Xil_ExceptionRegisterHandler - 2021.1 English - UG643
Register a handler for a specific exception. This handler is being called when the processor encounters the specified exception. Prototype void...
xilenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_DEV_GGS_0?contentId=wx0kQfgBVlgVJbv7Byo0dA
Define PM_DEV_GGS_0 - Define PM_DEV_GGS_0 - 2021.1 English - UG643
Definition #define PM_DEV_GGS_0(0x18248000U) Description Versal Virtual Device Nodes
definepmdevggsenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/XPm_PinCtrlGetFunction?contentId=_7GKuhKJ~G5IT_UT4e17cQ
XPm_PinCtrlGetFunction - XPm_PinCtrlGetFunction - 2021.1 English - UG643
This function is used to get the function on specified pin. Prototype XStatus XPm_PinCtrlGetFunction(const u32 PinId, u32 *const FunctionId); Parameters The...
xpmenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Xil_Out16LE
Xil_Out16LE - Xil_Out16LE - 2022.2 English - UG643
Perform a little-endian output operation for a 16-bit memory location by writing the specified value to the specified address. Prototype INLINE void...
xilenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/XPm_InitXilpm?contentId=3~~lwUsYljZcMmfBRGYwFg
XPm_InitXilpm - XPm_InitXilpm - 2021.1 English - UG643
Initialize xilpm library. Prototype XStatus XPm_InitXilpm(XIpiPsu *IpiInst); Parameters The following table lists the XPm_InitXilpm function arguments. Table...
xpmenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/User-Configurable-Parameters
User-Configurable Parameters - User-Configurable Parameters - 2022.2 English - UG643
This section provides detailed descriptions of the various user configurable parameters.
userconfigurableparametersenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_DEV_SPI_0?contentId=ecHsG3lk3NbKA~ED7koH7g
Define PM_DEV_SPI_0 - Define PM_DEV_SPI_0 - 2021.1 English - UG643
Definition #define PM_DEV_SPI_0(0x1822401bU) Description Versal Device Nodes
definepmdevspienglish
https://docs.amd.com/r/en-US/oslib_rm/XilFlash-Library-v4.12
XilFlash Library v4.12 - XilFlash Library v4.12 - 2025.2 English - UG643
libraryenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Zynq-UltraScale-MPSoC-eFUSE-PS-API
Zynq UltraScale+ MPSoC eFUSE PS API - Zynq UltraScale+ MPSoC eFUSE PS API - 2021.1 English - UG643
This chapter provides a linked summary and detailed descriptions of the Zynq MPSoC UltraScale+ eFUSE PS APIs. Example Usage For programming eFUSEs other than...
zynq ultrascalempsocefuseapienglish
https://docs.amd.com/r/2023.1-English/oslib_rm/Xil_ICacheInvalidateLine?contentId=ILz22nDKlWL7ENybZFGl0w
Xil_ICacheInvalidateLine - Xil_ICacheInvalidateLine - 2023.1 English - UG643
Invalidate an instruction cache line. If the instruction specified by the parameter adr is cached by the instruction cache, the cacheline containing that...
xilenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-XPM_RPU_BOOTMEM_HIVEC?contentId=UuO1ilJaAXVx6cEOYUmq3w
Define XPM_RPU_BOOTMEM_HIVEC - Define XPM_RPU_BOOTMEM_HIVEC - 2021.1 English - UG643
Definition #define XPM_RPU_BOOTMEM_HIVEC(1U) Description RPU Boot memory
definexpmrpuenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Clock-Nodes?contentId=90yWxvMEO~PXSdlQ4c7XLw
Clock Nodes - Clock Nodes - 2021.1 English - UG643
clocknodesenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Input/Output-Functions
Input/Output Functions - Input/Output Functions - 2022.2 English - UG643
The embedded libraries contain standard C functions for Input/Output (I/O), such as printf and scanf. These functions are large and might not be suitable for...
input outputfunctionsenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/XilSKey_UsrFuses
XilSKey_UsrFuses - XilSKey_UsrFuses - 2022.2 English - UG643
english
https://docs.amd.com/r/2022.2-English/oslib_rm/Xil_DisableMPURegionByRegNum?contentId=DKjMzysp6L1is8q6i70_rg
Xil_DisableMPURegionByRegNum - Xil_DisableMPURegionByRegNum - 2022.2 English - UG643
Disables the corresponding region number as passed by the user. Prototype u32 Xil_DisableMPURegionByRegNum(u32 reg_num); Parameters The following table lists...
xilenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-MICROBLAZE_PVR_USE_HW_MUL?contentId=fOuGy2jhKN0lfvifhsnAlQ
#Define MICROBLAZE_PVR_USE_HW_MUL - #Define MICROBLAZE_PVR_USE_HW_MUL - 2022.2 English - UG643
Description Return non-zero integer if hardware multiplier present. Parameters The following table lists the MICROBLAZE_PVR_USE_HW_MUL function arguments....
definemicroblazepvrusehw
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_RST_AIE_SHIM?contentId=CPG2ouIAs3Nl2kzZ4vBrFw
Define PM_RST_AIE_SHIM - Define PM_RST_AIE_SHIM - 2021.1 English - UG643
Definition #define PM_RST_AIE_SHIM(0xc10405fU) Description Versal Reset Nodes
definepmrstaieshim
https://docs.amd.com/r/2022.2-English/oslib_rm/XSecure_AesReset?contentId=UDK_uSABCmgOY3EifKseDA
XSecure_AesReset - XSecure_AesReset - 2022.2 English - UG643
This function sets and then clears the AES-GCM's reset line. Prototype void XSecure_AesReset(XSecure_Aes *InstancePtr); Parameters The following table lists...
english
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-PM_SUSPEND_STATE_CPU_IDLE
Define PM_SUSPEND_STATE_CPU_IDLE - Define PM_SUSPEND_STATE_CPU_IDLE - 2022.2 English - UG643
Definition #define PM_SUSPEND_STATE_CPU_IDLE0x0U Description State arguments of the self suspend
definepmsuspendstatecpu
https://docs.amd.com/r/2021.1-English/oslib_rm/XTime_SetTime?contentId=Id46IcfxBd9vIApOj3VSbg
XTime_SetTime - XTime_SetTime - 2021.1 English - UG643
Timer of A53 runs continuously and the time can not be set as desired. This API doesn't contain anything. It is defined to have uniformity across platforms....
xtimesettimeenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Arm-Cortex-R5F-Time-Functions
Arm Cortex-R5F Time Functions - Arm Cortex-R5F Time Functions - 2021.1 English - UG643
The xtime_l.h provides access to 32-bit TTC timer counter. These functions can be used by applications to track the time. Table 1. Quick Function Reference...
arm cortextime functionsenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Overview?contentId=nxt~wLU6YUt7i95N3fFjiw
Overview - Overview - 2022.2 English - UG643
The XilTimer library provides sleep and interval timer functionality, Hardware and Software features are differentiated using a layered approach. The top Level...
overviewenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/XPm_InitFinalize?contentId=Kh0tgnrpvk~3nUI3rOTTIA
XPm_InitFinalize - XPm_InitFinalize - 2021.1 English - UG643
This function is called to notify the power management controller about the completed power management initialization. Prototype int XPm_InitFinalize(void);...
xpmenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-XIL_EVENT_ERROR_MASK_PMCPAR
Define XIL_EVENT_ERROR_MASK_PMCPAR - Define XIL_EVENT_ERROR_MASK_PMCPAR - 2022.2 English - UG643
Definition #define XIL_EVENT_ERROR_MASK_PMCPAR(0x00000010U) Description Error event mask for PMC Switch and PMC IOU Parity Errors.
definexileventerrormask
https://docs.amd.com/r/2021.1-English/oslib_rm/Raw-API?contentId=GwtG~GI1hSAX2B5io0qAzA
Raw API - Raw API - 2021.1 English - UG643
The Raw API is callback based. Applications obtain access directly into the TCP stack and vice-versa. As a result, there is no extra socket layer, and using...
rawapienglish
https://docs.amd.com/r/2022.2-English/oslib_rm/XPm_InitSuspendCb?contentId=RfRlybYt~zdktSlMf52cRQ
XPm_InitSuspendCb - XPm_InitSuspendCb - 2022.2 English - UG643
Callback function to be implemented in each PU, allowing the power management controller to request that the PU suspend itself. Note: If the PU fails to act on...
xpmenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/XPm_PllGetMode?contentId=2Z1Jccf1WYN~kiwXri1nsw
XPm_PllGetMode - XPm_PllGetMode - 2022.2 English - UG643
This function is used to get the mode of specified PLL clock. Prototype XStatus XPm_PllGetMode(const u32 ClockId, u32 *const Value); Parameters The following...
xpmenglish
https://docs.amd.com/r/2023.1-English/oslib_rm/Xil_DisableMMU?contentId=ESwDZ4T9CM9E3Il066Np8A
Xil_DisableMMU - Xil_DisableMMU - 2023.1 English - UG643
Disable MMU for Cortex A53 processors in 32-bit mode. This function invalidates the TLBs, Branch Predictor Array and flushed the data cache before disabling...
xilenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-XPM_MAX_CAPABILITY
Define XPM_MAX_CAPABILITY - Define XPM_MAX_CAPABILITY - 2021.1 English - UG643
Definition #define XPM_MAX_CAPABILITY((u32) PM_CAP_ACCESS | (u32) PM_CAP_CONTEXT | (u32) PM_CAP_WAKEUP ) Description Requirement limits
definexpmmaxcapabilityenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/XilSecure-RSA-Common-APIs?contentId=ZeKZhkzeYhKv9nqDf9juWA
XilSecure RSA Common APIs - XilSecure RSA Common APIs - 2021.1 English - UG643
Table 1. Quick Function Reference Type Name Arguments int XSecure_RsaInitialize XSecure_Rsa * InstancePtr u8 * Mod u8 * ModExt u8 * ModExpo int...
common apisrsaenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/XilSKey_ZynqMp_EfusePs_WritePufChash?contentId=guUdlHn9ams_OGy2zvNbRQ
XilSKey_ZynqMp_EfusePs_WritePufChash - XilSKey_ZynqMp_EfusePs_WritePufChash - 2021.1 English - UG643
This function programs eFUSE with CHash value. Note: To generate the CHash value, please use XilSKey_Puf_Registration function. Prototype u32...
english
https://docs.amd.com/r/2021.1-English/oslib_rm/xil_printf?contentId=Po_7LvRO7GWsn_Kg9dVyeg
xil_printf - xil_printf - 2021.1 English - UG643
xil_printf() is a light-weight implementation of printf. It is much smaller in size (only 1 Kb). It does not have support for floating point numbers....
xilprintfenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/XFpga_PL_BitStream_Load?contentId=F7jQUxyJWjOkDWWQ264h5A
XFpga_PL_BitStream_Load - XFpga_PL_BitStream_Load - 2021.1 English - UG643
The API is used to load the bitstream file into the PL region. It supports the Vivado-generated bitstream(*.bit, *.bin) and Bootgen-generated bitstream(*.bin)...
plbitstreamloadenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-Xil_DCacheFlushRange?contentId=jOfw7O5BwAiHQ_lpFq~hmA
#Define Xil_DCacheFlushRange - #Define Xil_DCacheFlushRange - 2022.2 English - UG643
Description Flush the Data cache for the given address range. If the bytes specified by the address (adr) are cached by the Data cache, the cacheline...
definexilenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_STMIC_PMIO_1?contentId=yatVMSMCeQgfdR7Yn2C3hg
Define PM_STMIC_PMIO_1 - Define PM_STMIC_PMIO_1 - 2021.1 English - UG643
Definition #define PM_STMIC_PMIO_1(0x1410801cU) Description Versal MIO Nodes
definepmenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Configuring-Xilinx-Adapter-Options?contentId=bI~EVqqBzf3Sh_7O32dNvA
Configuring Xilinx Adapter Options - Configuring Xilinx Adapter Options - 2022.2 English - UG643
The Xilinx adapters for EMAC/GigE cores are configurable. Ethernetlite Adapter Options The following table describes the configuration parameters for the...
configuringxilinxadapteroptionsenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/XPm_DevIoctl?contentId=Cgc7KuNxJjdbfmkhsmIdwQ
XPm_DevIoctl - XPm_DevIoctl - 2021.1 English - UG643
This function performs driver-like IOCTL functions on shared system devices. Prototype XStatus XPm_DevIoctl(const u32 DeviceId, const pm_ioctl_id IoctlId,...
xpmenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/XPm_InitXilpm?contentId=Yt2rtlCbdpf~56Yc5GhbsQ
XPm_InitXilpm - XPm_InitXilpm - 2021.1 English - UG643
Initialize xilpm library. Prototype XStatus XPm_InitXilpm(XIpiPsu *IpiInst); Parameters The following table lists the XPm_InitXilpm function arguments. Table...
xpmenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-PM_STMIC_PMIO_12
Define PM_STMIC_PMIO_12 - Define PM_STMIC_PMIO_12 - 2022.2 English - UG643
Definition #define PM_STMIC_PMIO_12(0x14108027U) Description Versal MIO Nodes
definepmenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Xil_GetMPUFreeRegMask?contentId=FgDtvDba8w1m5LcVSto0aw
Xil_GetMPUFreeRegMask - Xil_GetMPUFreeRegMask - 2021.1 English - UG643
Returns the total number of free MPU regions available in the form of a mask. A bit of 1 in the returned 16 bit value represents the corresponding region...
xilenglish
https://docs.amd.com/r/2023.1-English/oslib_rm/XSECURE_CSU_RSA_RAM_SPAD?contentId=9fTczGFjsSFd9tt14Yg0Lw
XSECURE_CSU_RSA_RAM_SPAD - XSECURE_CSU_RSA_RAM_SPAD - 2023.1 English - UG643
bit for RSA RAM SPAD Definition #define XSECURE_CSU_RSA_RAM_SPAD(3U)
csursaramspadenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-PM_POWER_TCM_0_A?contentId=j3POSeeWJtJZiKqxlL~S7Q
Define PM_POWER_TCM_0_A - Define PM_POWER_TCM_0_A - 2022.2 English - UG643
Definition #define PM_POWER_TCM_0_A(0x4104010U) Description Versal Power Nodes
definepmpowertcmenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Specification?contentId=a8EmYKn9~y5079Rzo0FVLw
Specification - Specification - 2021.1 English - UG643
specificationenglish
https://docs.amd.com/r/2021.1-English/oslib_rm/Design-Summary?contentId=FDQ8kr88bi6v3CMJsiB3Iw
Design Summary - Design Summary - 2021.1 English - UG643
The following figure shows the flow diagram of how an user application interacts with XilFPGA interacts and other SW components for loading the bitstream from...
designsummaryenglish
https://docs.amd.com/r/2024.1-English/oslib_rm
Standalone Library Documentation: BSP and Libraries Document Collection (UG643) - 2024.1 English -...
BSP and Libraries Document Collection (UG643)
library documentation
https://docs.amd.com/r/2021.1-English/oslib_rm/XSecure_RsaKey?contentId=U~NXwEh9t6kgBRBJc4rioQ
XSecure_RsaKey - XSecure_RsaKey - 2021.1 English - UG643
english
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-XIL_EVENT_ERROR_MASK_SSIT3?contentId=H2edMYQm4WWKfCIZJIgntA
Define XIL_EVENT_ERROR_MASK_SSIT3 - Define XIL_EVENT_ERROR_MASK_SSIT3 - 2022.2 English - UG643
Definition #define XIL_EVENT_ERROR_MASK_SSIT3(0x20000000U) Description Error event mask for SSIT Error from Slave SLR1, Only used in Master SLR.
definexileventerrormask
https://docs.amd.com/r/2021.1-English/oslib_rm/Define-PM_POWER_OCM_3
Define PM_POWER_OCM_3 - Define PM_POWER_OCM_3 - 2021.1 English - UG643
Definition #define PM_POWER_OCM_3(0x410400fU) Description Versal Power Nodes
definepmpowerocmenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-PM_POWER_FPD
Define PM_POWER_FPD - Define PM_POWER_FPD - 2022.2 English - UG643
Definition #define PM_POWER_FPD(0x420c003U) Description Versal Power Nodes
definepmpowerfpdenglish
https://docs.amd.com/r/2023.1-English/oslib_rm/Xil_L1DCacheFlush?contentId=Gnelbcd9MAA3IvUOs2iQVA
Xil_L1DCacheFlush - Xil_L1DCacheFlush - 2023.1 English - UG643
Flush the level 1 Data cache. Note: In Cortex A9, there is no cp instruction for flushing the whole D-cache. Need to flush each line. Prototype void...
xilenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/Define-XPM_TAPDELAY_BYPASS_DISABLE?contentId=eXk6u~jiWuKxri4sfzwjtw
Define XPM_TAPDELAY_BYPASS_DISABLE - Define XPM_TAPDELAY_BYPASS_DISABLE - 2022.2 English - UG643
Definition #define XPM_TAPDELAY_BYPASS_DISABLE(0U) Description Tap delay bypass
definexpmbypassdisableenglish
https://docs.amd.com/r/2022.2-English/oslib_rm/RotateLeft?contentId=G1bO7qqt_pXtQHOX28cS4Q
RotateLeft - RotateLeft - 2022.2 English - UG643
Rotates the provided value to the left one bit position. Prototype u32 RotateLeft(u32 Input, u8 Width); Parameters The following table lists the RotateLeft...
english